Patents by Inventor Chi-Chun Lin

Chi-Chun Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240163947
    Abstract: A method for multi-link operation (MLO) is provided. The method for MLO may be applied to an apparatus. The method for MLO may include the following steps. A multi-chip controller of the apparatus may assign different data to a plurality of chips of the apparatus, wherein each chip corresponds to one link of multi-links. Each chip may determine whether transmission of the assigned data has failed. A first chip of the chips may transmit the assigned data to an access point (AP) in response to the first chip determining that the transmission of the assigned data has not failed.
    Type: Application
    Filed: November 8, 2023
    Publication date: May 16, 2024
    Inventors: Cheng-Ying WU, Wei-Wen LIN, Shu-Min CHENG, Hui-Ping TSENG, Chi-Han HUANG, Chih-Chun KUO, Yang-Hung PENG, Hao-Hua KANG
  • Patent number: 11983475
    Abstract: A semiconductor device includes: M*1st conductors in a first layer of metallization (M*1st layer) and being aligned correspondingly along different corresponding ones of alpha tracks and representing corresponding inputs of a cell region in the semiconductor device; and M*2nd conductors in a second layer of metallization (M*2nd layer) aligned correspondingly along beta tracks, and the M*2nd conductors including at least one power grid (PG) segment and one or more of an output pin or a routing segment; and each of first and second ones of the input pins having a length sufficient to accommodate at most two access points; each of the access points of the first and second input pins being aligned to a corresponding different one of first to fourth beta tracks; and the PG segment being aligned with one of the first to fourth beta tracks.
    Type: Grant
    Filed: February 7, 2023
    Date of Patent: May 14, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Pin-Dai Sue, Po-Hsiang Huang, Fong-Yuan Chang, Chi-Yu Lu, Sheng-Hsiung Chen, Chin-Chou Liu, Lee-Chung Lu, Yen-Hung Lin, Li-Chun Tien, Yi-Kan Cheng
  • Publication number: 20240145632
    Abstract: A micro light emitting device includes an epitaxial structure, a conductive layer, and a first insulating layer. The epitaxial structure has a first surface and a second surface opposite to the first surface, and includes a first semiconductor layer, an active layer and a second semiconductor layer that are arranged in such order in a direction from the first surface to the second surface. The conductive layer is formed on a surface of the first semiconductor layer away from the active layer. The first insulating layer is formed on the surface of the first semiconductor layer away from the active layer, and exposes at least a part of the conductive layer.
    Type: Application
    Filed: October 23, 2023
    Publication date: May 2, 2024
    Inventors: Ming-Chun TSENG, Shaohua HUANG, Hongwei WANG, Kang-Wei PENG, Su-Hui LIN, Xiaomeng LI, Chi-Ming TSAI, Chung-Ying CHANG
  • Patent number: 11955370
    Abstract: A system and methods of forming a dielectric material within a trench are described herein. In an embodiment of the method, the method includes introducing a first precursor into a trench of a dielectric layer, such that portions of the first precursor react with the dielectric layer and attach on sidewalls of the trench. The method further includes partially etching portions of the first precursor on the sidewalls of the trench to expose upper portions of the sidewalls of the trench. The method further includes introducing a second precursor into the trench, such that portions of the second precursor react with the remaining portions of the first precursor to form the dielectric material at the bottom of the trench.
    Type: Grant
    Filed: September 18, 2020
    Date of Patent: April 9, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Bo-Cyuan Lu, Ting-Gang Chen, Sung-En Lin, Chunyao Wang, Yung-Cheng Lu, Chi On Chui, Tai-Chun Huang, Chieh-Ping Wang
  • Publication number: 20240066816
    Abstract: A dyeing method for functional contact lenses includes the following steps: providing a dry lens body, including hydrogel with 0-90% water content, silicone hydrogel with 0-90% water content, or a combination thereof; preparing an amphoteric polymethyl ether prepolymer, combining the amphoteric polymethyl ether prepolymer with a hydrophilic monomer to form a masking ring material, and attaching the masking ring material to an inner surface of the dry lens body to form a masking ring layer; dropping a colorant onto the inner surface, making the masking ring layer surround the colorant, irradiating the colorant with an ultraviolet light and then heating and fixing the colorant to form a dyed layer on the inner surface; and placing the dry lens body in water to hydrate and removing the masking ring layer to obtain a wet lens body.
    Type: Application
    Filed: August 29, 2022
    Publication date: February 29, 2024
    Inventors: Wen-Ching LIN, Ching-Fang LEE, Chi-Ching CHEN, Hsiao-Chun LIN
  • Publication number: 20210272877
    Abstract: A semiconductor device includes a substrate, at least one heterojunction bipolar transistor including a semiconductor unit and an electrode unit, an insulation unit, and a heat dissipation unit. The insulation unit covers the substrate and the heterojunction bipolar transistor such that a collector electrode, a base electrode and an emitter electrode of the electrode unit are electrically isolated from one another. The insulation unit is formed with an opening to expose an electrode wire of the emitter electrode. The heat dissipation unit covers the electrode wire and is made of an electrically conductive and heat dissipating material, and has a thickness that is not less than 3 ?m.
    Type: Application
    Filed: September 18, 2020
    Publication date: September 2, 2021
    Inventors: You-Min CHI, Kuo-Chun HUANG, Kun-Mu HSIEH, Yu-Chen CHIU, Chi-Chun LIN, Wen-Pin LU, Chao-Hung CHEN
  • Patent number: 10345373
    Abstract: A method for inspecting a semiconductor device structure is provided. The method includes receiving a semiconductor device structure having a to-be-inspected feature. The semiconductor device structure has a first surface and a second surface. The method also includes applying a polymer-containing solution over the first surface of the semiconductor device structure. The method further includes disposing a transparent substrate over the first surface of the semiconductor device structure and the polymer-containing solution. In addition, the method includes irradiating the polymer-containing solution with a light to form an adhesive layer between the transparent substrate and the semiconductor device structure. The adhesive layer bonds the transparent substrate and the semiconductor device structure. The method also includes inspecting the to-be-inspected feature.
    Type: Grant
    Filed: September 29, 2017
    Date of Patent: July 9, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Baohua Niu, Chia-Nan Ke, Chi-Chun Lin
  • Publication number: 20190101586
    Abstract: A method for inspecting a semiconductor device structure is provided. The method includes receiving a semiconductor device structure having a to-be-inspected feature. The semiconductor device structure has a first surface and a second surface. The method also includes applying a polymer-containing solution over the first surface of the semiconductor device structure. The method further includes disposing a transparent substrate over the first surface of the semiconductor device structure and the polymer-containing solution. In addition, the method includes irradiating the polymer-containing solution with a light to form an adhesive layer between the transparent substrate and the semiconductor device structure. The adhesive layer bonds the transparent substrate and the semiconductor device structure. The method also includes inspecting the to-be-inspected feature.
    Type: Application
    Filed: September 29, 2017
    Publication date: April 4, 2019
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Baohua NIU, Chia-Nan KE, Chi-Chun LIN
  • Patent number: 9571290
    Abstract: A network coupling device includes a transformer module for transmitting a network signal from a network system, and a power processing module coupled to the transformer module and configured to transmit a direct current power signal from the network system. The transformer module and the power processing module satisfy a relation |ZT?ZT+L|?0.25ZT where ZT is an impedance of the transformer module when disconnected from the power processing module, and ZT+L is an effective impedance of the transformer module with the power processing module connected thereto.
    Type: Grant
    Filed: July 11, 2014
    Date of Patent: February 14, 2017
    Assignee: BOTHHAND ENTERPRISE INC.
    Inventors: Chung-Cheng Fan, Yi-Jheng Lin, Ting-Yu Tai, Chi-Chun Lin, Hung-Yuan Cheng
  • Publication number: 20150162953
    Abstract: A network coupling device includes a transformer module for transmitting a network signal from a network system, and a power processing module coupled to the transformer module and configured to transmit a direct current power signal from the network system. The transformer module and the power processing module satisfy a relation |ZT?ZT+L|?0.25ZT where ZT is an impedance of the transformer module when disconnected from the power processing module, and ZT+L is an effective impedance of the transformer module with the power processing module connected thereto.
    Type: Application
    Filed: July 11, 2014
    Publication date: June 11, 2015
    Inventors: Chung-Cheng FAN, Yi-Jheng LIN, Ting-Yu TAI, Chi-Chun LIN, Hung-Yuan CHENG
  • Patent number: 8279945
    Abstract: Methods for compensating timing errors in an A/V stream are provided. An embodiment of the methods includes: receiving a plurality of encoded video frames of a current Group of pictures (GOP) from the video encoder and a plurality of encoded audio frames; when an error occurs in the video encoder, utilizing a most recent encoded video frame of a previous GOP received from the video encoder as a reference to generate a plurality of dummy video frames; and utilizing the dummy video frames to pad the current GOP.
    Type: Grant
    Filed: January 28, 2008
    Date of Patent: October 2, 2012
    Assignee: Mediatek Inc.
    Inventors: Chi-Chun Lin, Shih-Rong Kao
  • Publication number: 20090240716
    Abstract: A data processing method is disclosed. A first stream data including a first part and a second part is received. The second part is processed according to the first part of the first stream data. The processed first stream data is transformed into a second stream data.
    Type: Application
    Filed: March 20, 2008
    Publication date: September 24, 2009
    Applicant: MEDIATEK INC.
    Inventors: Chi-Chun Lin, Jaan-Huei Chen, Te-Ming Chiu
  • Publication number: 20090190670
    Abstract: Methods for compensating timing errors in an A/V stream are provided. An embodiment of the methods includes: receiving a plurality of encoded video frames of a current Group of pictures (GOP) from the video encoder and a plurality of encoded audio frames; when an error occurs in the video encoder, utilizing a most recent encoded video frame of a previous GOP received from the video encoder as a reference to generate a plurality of dummy video frames; and utilizing the dummy video frames to pad the current GOP.
    Type: Application
    Filed: January 28, 2008
    Publication date: July 30, 2009
    Inventors: Chi-Chun Lin, Shih-Rong Kao
  • Publication number: 20090103897
    Abstract: A method for synchronizing audio and video data in an Audio Video Interleave (AVI) file, the AVI file containing a plurality of audio and video chunks, includes: determining a frame rate error of a group of consecutive main access units (GMAU) according to a video clock and an audio clock; determining a GMAU presentation time stamp (PTS) according to the frame rate error; and updating the AVI file with the GMAU PTS, so the GMAU will be played utilizing the GMAU PTS.
    Type: Application
    Filed: October 22, 2007
    Publication date: April 23, 2009
    Inventors: Min-Shu Chen, Chi-Chun Lin, Ji-Shiun Li
  • Publication number: 20080175564
    Abstract: A system for pre-processing supplementary program data is provided. The system includes: a storage device, for storing at least one supplementary program data unit; a parser, coupled to the storage device, for storing the supplementary program data unit in the storage device, and determining a presentation timing corresponding to the supplementary program data unit, the presentation timing including a presentation-on time; and a Presentation Unit (PU), coupled to the parser and the storage device, for pre-processing the supplementary program data unit to generate presentation content of the supplementary program data unit before the presentation-on time is reached, and for presenting the supplementary program data unit according to the presentation timing and the presentation content.
    Type: Application
    Filed: January 19, 2007
    Publication date: July 24, 2008
    Inventor: Chi-Chun Lin