Patents by Inventor Chi-Chun Peng

Chi-Chun Peng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12362317
    Abstract: A die dipping structure includes a plate including a first recessed portion having a first depth and filled with a first flux material. The plate further includes a second recessed portion, isolated from the first recessed portion, with a second depth and filled with a second flux material. The second depth is different from the first depth. The die dipping structure further includes a motor configured to move the plate so as to simultaneously dip a first die and a second die into the flux of the first recessed portion and the flux of the second recessed portion, respectively.
    Type: Grant
    Filed: February 22, 2022
    Date of Patent: July 15, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chi-Chun Peng, Chih-Yuan Chiu, Min-Yu Wu, Yi-Kai Tu, Cheng-Lung Wu
  • Patent number: 12322615
    Abstract: A method of removing a sacrificial substructure from a support structure is disclosed. The method includes receiving the support structure, where the support structure has the sacrificial substructure connected thereto, the sacrificial substructure having functioning electrical devices removed therefrom. The method also includes applying a barrier to the sacrificial substructure, puncturing the sacrificial substructure with a puncture plate to secure the sacrificial substructure to the puncture plate, and detaching the sacrificial substructure from the support structure by moving the puncture plate with respect to the support structure.
    Type: Grant
    Filed: August 11, 2022
    Date of Patent: June 3, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chen Liang Chang, Kuo Hui Chang, Ryder Su, Chi-Chun Peng
  • Publication number: 20250062274
    Abstract: A bonding apparatus with a bonding head having vacuum channels and switchable channels, and the method of forming the same are provided. The bonding apparatus may include a vacuum pump, a blower, a controller communicatively coupled to the vacuum pump and the blower, and a bonding head. The bonding head may include a main body, a first vacuum channel in the main body, wherein the first vacuum channel is connected to the vacuum pump, and a first switchable channel in the main body, wherein the first switchable channel is connected to the vacuum pump and the blower.
    Type: Application
    Filed: August 18, 2023
    Publication date: February 20, 2025
    Inventors: Jen-Hao Liu, Amram Eitan, Chih-Yuan Chiu, Chi-Chun Peng, Yu-Hong Du
  • Publication number: 20250054786
    Abstract: A die bonding tool includes a bond head having a moveable component. The moveable component may be moveable between an extended position in which a lower surface of the moveable component protrudes below a lower surface of the bond head and a retracted position in which the lower surface of the moveable component does not protrude below the lower surface of the bond head. The moveable component may be used to control a shape of a semiconductor die secured to the lower surface of the bond head during a process of bonding the semiconductor die to a substrate. Accordingly, void areas and other bonding defects may be avoided and the bond formed between the semiconductor die and the target substrate may be improved.
    Type: Application
    Filed: August 7, 2023
    Publication date: February 13, 2025
    Inventors: Chih-Yuan Chiu, Chi-Chun Peng, Yu-Hong Du, Hui-Ting Lin, Jen-Hao Liu, Amram Eitan
  • Publication number: 20250006690
    Abstract: A bonded assembly may be formed by performing a chip plasma clean process on a semiconductor chip; generating at least one chip infrared image of a cleaned side of the semiconductor chip; measuring an average emissivity of at least one metallic region in the at least one chip infrared image; performing a subsequent processing step selected from a bonding step and an alternative processing step based on the measured average emissivity. The bonding step is performed if the measured average emissivity is less than a predetermined emissivity threshold value. The alternative processing step is performed if the measured average emissivity is greater than the predetermined emissivity threshold value. The alternative processing step may be selected from an additional clean step and an additional inspection step.
    Type: Application
    Filed: June 29, 2023
    Publication date: January 2, 2025
    Inventors: Amram Eitan, Jen-Hao Liu, Chih-Yuan Chiu, Hui-Ting Lin, Chi-Chun Peng
  • Publication number: 20240297143
    Abstract: A bonding tool and a bonding method are provided. The method includes attaching a semiconductor die to a bonding tool having a first surface, wherein the bonding tool comprises a bending member movably arranged in a trench of the bonding tool, and the bending member protrudes from the first surface and bends the semiconductor die; moving the semiconductor die toward a semiconductor wafer to cause a retraction of the bending member and a partial bonding at a portion of the semiconductor die and the semiconductor wafer; and causing a full bonding between the semiconductor die and the semiconductor wafer subsequent to the partial bonding.
    Type: Application
    Filed: May 3, 2024
    Publication date: September 5, 2024
    Inventors: CHIH-YUAN CHIU, SHIH-YEN CHEN, CHI-CHUN PENG, HONG-KUN CHEN, HUI-TING LIN
  • Publication number: 20240234481
    Abstract: A method of forming a semiconductor device, the method including forming a first insulation layer over a substrate, depositing a first stack of magnetic layers over the first insulation layer, etching the first stack of magnetic layers such that a sidewall of the first stack of magnetic layers forms a stairstep pattern, forming a first photosensitive layer over the first stack of magnetic layers, the first insulation layer, and the substrate, wherein a thickness of the first photosensitive layer above a center of a first step of the stairstep pattern is different from a thickness of the first photosensitive layer above a center of a second step of the stairstep pattern, forming a first conductive feature over the first photosensitive layer, depositing a second insulation layer over the first photosensitive layer and the first conductive feature, and depositing a second magnetic layer over the second insulation layer.
    Type: Application
    Filed: January 6, 2023
    Publication date: July 11, 2024
    Inventors: Szu-Shu Yang, Chun Yi Wu, Kai Tzeng, Yuh-Sen Chang, Chi-Cheng Chen, Chi-Chun Peng
  • Patent number: 12009337
    Abstract: A bonding tool and a bonding method are provided. The method includes attaching a semiconductor die to a bonding tool having a first surface, wherein the bonding tool comprises a bending member movably arranged in a trench of the bonding tool, and the bending member protrudes from the first surface and bends the semiconductor die; moving the semiconductor die toward a semiconductor wafer to cause a retraction of the bending member and a partial bonding at a portion of the semiconductor die and the semiconductor wafer; and causing a full bonding between the semiconductor die and the semiconductor wafer subsequent to the partial bonding.
    Type: Grant
    Filed: February 15, 2022
    Date of Patent: June 11, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Chih-Yuan Chiu, Shih-Yen Chen, Chi-Chun Peng, Hong-Kun Chen, Hui-Ting Lin
  • Publication number: 20240055280
    Abstract: A method of removing a sacrificial substructure from a support structure is disclosed. The method includes receiving the support structure, where the support structure has the sacrificial substructure connected thereto, the sacrificial substructure having functioning electrical devices removed therefrom. The method also includes applying a barrier to the sacrificial substructure, puncturing the sacrificial substructure with a puncture plate to secure the sacrificial substructure to the puncture plate, and detaching the sacrificial substructure from the support structure by moving the puncture plate with respect to the support structure.
    Type: Application
    Filed: August 11, 2022
    Publication date: February 15, 2024
    Inventors: Chen Liang Chang, Kuo Hui Chang, Ryder Su, Chi-Chun Peng
  • Publication number: 20240047255
    Abstract: A wafer alignment assembly is provided. The wafer alignment assembly includes: a first tapered wall extending in a first horizontal direction; a first spring wall attached to an inner surface of the first tapered wall; a first set of conveyor rollers configured to rotate; a second tapered wall extending in the first horizontal direction, wherein the first tapered wall and the second tapered wall are characterized by a tapered shape that facilitates entry of a wafer assembly; a second spring wall attached to an inner surface of the first tapered wall; and a second set of conveyor rollers configured to rotate.
    Type: Application
    Filed: August 4, 2022
    Publication date: February 8, 2024
    Inventors: Chia-Ching Lee, Tung-Hsuan Tsai, Hsin-Tai Wang, Chen Liang Chang, Kuo Hui Chang, Chi-Chun Peng
  • Publication number: 20240038571
    Abstract: At least one embodiment, a vacuum chuck includes a moisture gate structure that allows for moisture to escape to reduce an amount of warpage in a workpiece when present on the vacuum chuck. The moisture gate structure includes a base portion that extends laterally outward from a central vacuum portion of the vacuum chuck, and a plurality of protrusions are spaced apart from the central vacuum portion and extend outward from the base portion. End surfaces of the plurality of protrusions contact a backside surface of the workpiece (e.g., a wafer on a carrier) when the workpiece is present on the vacuum chuck. The vacuum chuck may further include one or more guide portions that act as guides such that the workpiece remains properly aligned and within position when present on the vacuum chuck.
    Type: Application
    Filed: July 28, 2022
    Publication date: February 1, 2024
    Inventors: Po-Yo SU, Young-Wei LIN, Yu Liang HUANG, Chia-Ching LEE, Chi-Chun PENG, Chen Liang CHANG, Kuo Hui CHANG
  • Publication number: 20230032570
    Abstract: A bonding tool and a bonding method are provided. The method includes attaching a semiconductor die to a bonding tool having a first surface, wherein the bonding tool comprises a bending member movably arranged in a trench of the bonding tool, and the bending member protrudes from the first surface and bends the semiconductor die; moving the semiconductor die toward a semiconductor wafer to cause a retraction of the bending member and a partial bonding at a portion of the semiconductor die and the semiconductor wafer; and causing a full bonding between the semiconductor die and the semiconductor wafer subsequent to the partial bonding.
    Type: Application
    Filed: February 15, 2022
    Publication date: February 2, 2023
    Inventors: CHIH-YUAN CHIU, SHIH-YEN CHEN, CHI-CHUN PENG, HONG-KUN CHEN, HUI-TING LIN
  • Publication number: 20230023353
    Abstract: A die dipping structure includes a plate including a first recessed portion having a first depth and filled with a first flux material. The plate further includes a second recessed portion, isolated from the first recessed portion, with a second depth and filled with a second flux material. The second depth is different from the first depth. The die dipping structure further includes a motor configured to move the plate so as to simultaneously dip a first die and a second die into the flux of the first recessed portion and the flux of the second recessed portion, respectively.
    Type: Application
    Filed: February 22, 2022
    Publication date: January 26, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chi-Chun Peng, Chih-Yuan Chiu, Min-Yu Wu, Yi-Kai Tu, Cheng-Lung Wu