Abstract: The disclosure provides a pixel circuit for driving a light emitting diode. A second terminal of a driving transistor is coupled to a first terminal of the light emitting diode, and a control terminal of the driving transistor receives a bias voltage. A coupling switch is coupled between a first terminal and the control terminal of the driving transistor and controlled by a first selection signal to be turned on or off. A first terminal of a first switch receives a display data voltage or a reference voltage, and the first switch is controlled by a second selection signal to be turned on or off. A first terminal of a second switch is coupled to a second terminal of the first switch. A second terminal of the second switch is coupled between the second terminal of the driving transistor and the light emitting diode, and the second switch is controlled by the first selection signal to be turned on or off.

Abstract: A pixel array includes a plurality of pixels. Each pixel has a first sub-pixel, a second sub-pixel, and a pair of third sub-pixels. The first sub-pixel of each pixel and the first sub-pixels of three adjacent pixels are arranged in a two by two array, the second sub-pixel of each pixel and the second sub-pixels of three adjacent pixels are arranged in a two by two array, and one of each of the third sub-pixels of each pixel and one of the third sub-pixels of three adjacent pixels are arranged in a two by two array. A scan line is connected to a switch unit of each of the sub-pixels in a pixel.

Abstract: A display panel including a pixel array and a gate driver circuit is provided. The pixel array has a plurality of pixels. The gate driver circuit is used for providing a plurality of gate signals to the pixels and includes a plurality of shift registers and a plurality of demultiplexers. The shift registers respectively receive a first gate signal of the gate signals and a first clock signal of a plurality of clock signals to respectively provide a first control signal and a second control signal. The demultiplexers respectively receive a plurality of second clock signals of the clock signals, respectively turn-on according to the first control signal provided by the corresponding one of the shift registers, and respectively cut-off according to the second control signal provided by the corresponding one of the shift registers.

Abstract: A pixel array includes a plurality of pixels. Each pixel has a first sub-pixel, a second sub-pixel, and a pair of third sub-pixels. The first sub-pixel of each pixel and the first sub-pixels of three adjacent pixels are arranged in a two by two array, the second sub-pixel of each pixel and the second sub-pixels of three adjacent pixels are arranged in a two by two array, and one of each of the third sub-pixels of each pixel and one of the third sub-pixels of three adjacent pixels are arranged in a two by two array. A scan line is connected to a switch unit of each of the sub-pixels in a pixel.

Abstract: A pixel array includes a plurality of pixels. Each pixel has a first sub-pixel, a second sub-pixel, and a pair of third sub-pixels. The first sub-pixel of each pixel and the first sub-pixels of three adjacent pixels are arranged in a two by two array, the second sub-pixel of each pixel and the second sub-pixels of three adjacent pixels are arranged in a two by two array, and one of each of the third sub-pixels of each pixel and one of the third sub-pixels of three adjacent pixels are arranged in a two by two array. A scan line is connected to a switch unit of each of the sub-pixels in a pixel.

Abstract: A gate driving circuit is provided. The gate driving circuit includes a plurality of gate driving units sequentially coupled to each other. Each of the gate driving units includes a shift register and a de-multiplexer. The shift register receives a start pulse signal, and generates a first control signal and a second control signal according to the start pulse signal and a scan controlling signal, where when the shift register converts the first control signal into the second control signal, the shift register pulls down a voltage level of the first control signal according to the second control signal. The de-multiplexer receives a part of a plurality of clock signals for generating a plurality of gate signals sequentially according to the first control signal, where the clock signals are enabled sequentially, and enable periods of two sequential clock signals are partially overlapped with each other.

Abstract: A gate driving circuit is provided. The gate driving circuit includes a plurality of gate driving units sequentially coupled to each other. Each of the gate driving units includes a shift register and a de-multiplexer. The shift register receives a start pulse signal, and generates a first control signal and a second control signal according to the start pulse signal and a scan controlling signal, where when the shift register converts the first control signal into the second control signal, the shift register pulls down a voltage level of the first control signal according to the second control signal. The de-multiplexer receives a part of a plurality of clock signals for generating a plurality of gate signals sequentially according to the first control signal, where the clock signals are enabled sequentially, and enable periods of two sequential clock signals are partially overlapped with each other.

Abstract: A pixel array includes a plurality of pixels. Each pixel has a first sub-pixel, a second sub-pixel, and a pair of third sub-pixels. The first sub-pixel of each pixel and the first sub-pixels of three adjacent pixels are arranged in a two by two array, the second sub-pixel of each pixel and the second sub-pixels of three adjacent pixels are arranged in a two by two array, and one of each of the third sub-pixels of each pixel and one of the third sub-pixels of three adjacent pixels are arranged in a two by two array. A scan line is connected to a switch unit of each of the sub-pixels in a pixel.

Abstract: A display panel including a pixel array and a gate driver circuit is provided. The pixel array has a plurality of pixels. The gate driver circuit is used for providing a plurality of gate signals to the pixels and includes a plurality of shift registers and a plurality of demultiplexers. The shift registers respectively receive a first gate signal of the gate signals and a first clock signal of a plurality of clock signals to respectively provide a first control signal and a second control signal. The demultiplexers respectively receive a plurality of second clock signals of the clock signals, respectively turn-on according to the first control signal provided by the corresponding one of the shift registers, and respectively cut-off according to the second control signal provided by the corresponding one of the shift registers.

Abstract: A method for reducing double images of a frame is disclosed. The frame is divided into a plurality of regions. The method includes generating a plurality of output enable (OE) signals, which are utilized to respectively adjust a plurality of conduction durations of a plurality of gate lines of the corresponding regions. The OE signals are outputted to a gate driver for generating a plurality of scan signals of the corresponding regions. The gate lines, which correspond to the regions, are driven by the gate driver according to the scan signals.

Abstract: A circuit for compensating color shift of a color sequential display method includes an image processing unit and a timing control circuit. The image processing unit includes a gray level generation unit, a pre-processing unit, and a color compensation unit . The gray level generation generates first gray levels of red, green, and blue sub-pixels. The pre-processing unit generates a pure color uniformity of a display panel and a color compensation value. The color compensation unit generates a color saturation of a pixel, a compensation difference of the pixel, and gray levels of red, green, and blue sub-pixels of a compensated pixel. The timing control circuit sequences the gray levels of the red, green, and blue sub-pixels of the compensated pixel according to the color sequential display method, and outputs the gray levels of the red, green, and blue sub-pixels of the compensated pixel to the display panel.

Abstract: A circuit for compensating color shift of a color sequential display method includes an image processing unit and a timing control circuit. The image processing unit includes a gray level generation unit, a pre-processing unit, and a color compensation unit. The gray level generation generates first gray levels of red, green, and blue sub-pixels. The pre-processing unit generates a pure color uniformity of a display panel and a color compensation value. The color compensation unit generates a color saturation of a pixel, a compensation difference of the pixel, and gray levels of red, green, and blue sub-pixels of a compensated pixel. The timing control circuit sequences the gray levels of the red, green, and blue sub-pixels of the compensated pixel according to the color sequential display method, and outputs the gray levels of the red, green, and blue sub-pixels of the compensated pixel to the display panel.

Abstract: A zoom lens array, including a liquid crystal layer, a first strip electrode, and a second strip electrode, is provided. The liquid crystal layer has a plurality of zoom regions. The first strip electrode is disposed on an upper side of the liquid crystal layer and located at the boundary between the zoom regions. The second strip electrode is disposed on a lower side of the liquid crystal layer and located at the boundary between the zoom regions. The first strip electrode and the second strip electrode are alternatively arranged. Moreover, a switchable two and three dimensional display with the above zoom lens array is also provided.

Abstract: An image processing method includes the following steps. First, an image data is provided. The image data includes at least one first image section and at least one second image section. Then, an image distribution data is provided. The image distribution data records a position of the first image section and a position of the second image section. Next, an encoding step is performed to bury the image distribution data in the image data so as to form a frame data.

Abstract: An adaptive feedback control method of a field sequential color display includes: a rearrangement step of converting gray-scale values of a three primary color field of an input image into gray-scale values of a new three primary color field and a dominated color field; a sampling step of performing a pixel sampling on a resolution of the input image in a sampling interval; a feedback control step of performing a pixel by pixel sum operation for each separated color on a color break-up value and a color value of the input image in a Lu?v? color space to obtain a color difference sum, and performing a feedback control at a bit precision on the color difference sum; and a liquid crystal/backlight synchronization step of synchronizing a liquid crystal signal and a backlight grayscale value of the input image according to the minimum color difference sum.

Abstract: A circuit for compensating color shift of a color sequential display method includes an image processing unit and a timing control circuit. The image processing unit includes a gray level generation unit, a pre-processing unit, and a color compensation unit. The gray level generation generates first gray levels of red, green, and blue sub-pixels. The pre-processing unit generates a pure color uniformity of a display panel and a color compensation value. The color compensation unit generates a color saturation of a pixel, a compensation difference of the pixel, and gray levels of red, green, and blue sub-pixels of a compensated pixel. The timing control circuit sequences the gray levels of the red, green, and blue sub-pixels of the compensated pixel according to the color sequential display method, and outputs the gray levels of the red, green, and blue sub-pixels of the compensated pixel to the display panel.

Abstract: A multi-dimensional touch display device includes a multi-dimensional display device and a touch sensing device. The multi-dimensional display device is used to provide stereoscopic images with different depths. The touch sensing device connected to the multi-dimensional display device has a plurality of sensing surfaces for determining a planar coordinate and a depth of a touch input point.

Abstract: A method for reducing double images of a frame is disclosed. The frame is divided into a plurality of regions. The method includes generating a plurality of output enable (OE) signals, which are utilized to respectively adjust a plurality of conduction durations of a plurality of gate lines of the corresponding regions. The OE signals are outputted to a gate driver for generating a plurality of scan signals of the corresponding regions. The gate lines, which correspond to the regions, are driven by the gate driver according to the scan signals.

Abstract: A method for driving a color sequential liquid crystal display device first provides a vertical synchronization signal for defining a driving period, a field synchronization signal for defining a plurality of fields in the driving period, and a plurality of gamma voltages each related to a corresponding field in the driving period. Next, a plurality of control signals are outputted according to the vertical synchronization signal and the field synchronization signal. In a specific field, a corresponding gamma voltage among the plurality of gamma voltages is outputted according to the plurality of control signals.

Abstract: The present invention discloses a liquid crystal display with function of static color compensation and method thereof, the purpose of the present invention is achieved by utilizing LC Off technique and light sensing technique. The liquid crystal display comprises: a liquid crystal plate; a backlight, disposed on at least one side of the liquid crystal plate; at least one light sensor, disposed adjacent to the liquid crystal plate, and the light sensor has a sensing plane which faces to the backlight; and a timing controller, which receives brightness value measured from the light sensor when LC Off and computes the data to monitor the brightness and chromaticity of the backlight.