Patents by Inventor Chi-Fu Yu

Chi-Fu Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9781994
    Abstract: One or more techniques or systems for cleaning wafers during semiconductor fabrication or an associated brush are provided herein. In some embodiments, the brush includes a brush body and one or more inner hole supports within the brush body. For example, a first inner hole support and a second inner hole support define a first inner hole associated with a first size. For another example, a third inner hole support and a fourth inner hole support define a second inner hole associated with a second size different than the first size. In some embodiments, a cleaning solution is applied to a wafer based on a first flow rate at a first brush position and based on a second flow rate at a second brush position. In this manner, a flow field associated with wafer cleaning is provided, thus enhancing cleaning efficiency, for example.
    Type: Grant
    Filed: December 7, 2012
    Date of Patent: October 10, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Shang-Yuan Yu, Ming-Te Chen, Chi-Fu Yu, Shao-Yen Ku, Tzu-Yang Chung, Hsiao Chien-Wen, Shan-Ching Lin
  • Publication number: 20150187616
    Abstract: Mechanisms of adjustable laser beams for LSA (Laser Spike Annealing) are provided. A computing device receives input mask information relative to a silicon wafer, and analyzes the input mask information so as to generate a control signal. A laser generator generates a laser beam, and adjusts a beam length of the laser beam according to the control signal. Such mechanisms of the disclosure effectively eliminate the stitch effect on the silicon wafer and further increase the wafer yield.
    Type: Application
    Filed: December 31, 2013
    Publication date: July 2, 2015
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Po-Chun HUANG, Lee-Te TSENG, Wen-Chieh HUANG, Chi-Fu YU, Ming-Te CHEN
  • Publication number: 20140158155
    Abstract: One or more techniques or systems for cleaning wafers during semiconductor fabrication or an associated brush are provided herein. In some embodiments, the brush includes a brush body and one or more inner hole supports within the brush body. For example, a first inner hole support and a second inner hole support define a first inner hole associated with a first size. For another example, a third inner hole support and a fourth inner hole support define a second inner hole associated with a second size different than the first size. In some embodiments, a cleaning solution is applied to a wafer based on a first flow rate at a first brush position and based on a second flow rate at a second brush position. In this manner, a flow field associated with wafer cleaning is provided, thus enhancing cleaning efficiency, for example.
    Type: Application
    Filed: December 7, 2012
    Publication date: June 12, 2014
    Applicant: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Shang-Yuan Yu, Ming-Te Chen, Chi-Fu Yu, Shao-Yen Ku, Tzu-Yang Chung, Hsiao Chien-Wen, Shan-Ching Lin
  • Patent number: 6787781
    Abstract: An arc chamber filament for an ion implanter used to implant ions in a semiconductor wafer substrate during the fabrication of integrated circuits on the substrate. The filament includes a pair of parallel filament segments each of which is connected to a voltage source at one end. The parallel filament segments are connected to each other through a bidirectional winding configuration which defines at least one generally U-shaped winding unit on each side of a plane of symmetry bisecting the filament.
    Type: Grant
    Filed: September 24, 2003
    Date of Patent: September 7, 2004
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hom-Chung Lin, Mei-Lan Hung, Chi-Fu Yu, Shin-Ho Tzeng
  • Patent number: 6767407
    Abstract: A substrate holding mechanism which is particularly adaptable to automatically centering a semiconductor wafer on a platen spider as the wafer is lowered from a wafer loading and unloading position to a wafer processing position in a medium current implanter such as a Varian EHP500. Upon subsequent placement of a mechanical clamp on the wafer to hold the wafer on the platen, the clamp fingers of the clamp engage the edge of the wafer with substantially uniform pressure to prevent micro-cracking or fracturing of the wafer.
    Type: Grant
    Filed: May 7, 2002
    Date of Patent: July 27, 2004
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd
    Inventors: Chi-Fu Yu, Song-Yueha Lin, Hom-Chung Lin, Zuo-Chang Yen
  • Patent number: 6737663
    Abstract: An apparatus and a method for detecting the tilt angle of a wafer platform in a process machine, particularly in a medium density ion implanter. The apparatus and method can be used to accurately calibrate the zero-angle position of a wafer platform in the medium energy ion implanter. The apparatus includes a process chamber that has a cavity and a wafer platform therein, a window that is substantially transparent to laser energy mounted in a top wall of the chamber, and a laser emitter and receiver positioned outside the process chamber juxtaposed to the window for emitting a laser beam onto a wafer positioned on the wafer platform and receiving a reflected laser beam to determine a tilt angle of the wafer platform by the intensity of the reflected laser beam.
    Type: Grant
    Filed: May 22, 2002
    Date of Patent: May 18, 2004
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hom-Chung Lin, Song-Yueha Lin, Hu-Li Sun, Chi-Fu Yu, Wu-Han Jiang
  • Publication number: 20030218144
    Abstract: An apparatus and a method for detecting the tilt angle of a wafer platform in a process machine, particularly in a medium density ion implanter. The apparatus and method can be used to accurately calibrate the zero-angle position of a wafer platform in the medium energy ion implanter. The apparatus includes a process chamber that has a cavity and a wafer platform therein, a window that is substantially transparent to laser energy mounted in a top wall of the chamber, and a laser emitter and receiver positioned outside the process chamber juxtaposed to the window for emitting a laser beam onto a wafer positioned on the wafer platform and receiving a reflected laser beam to determine a tilt angle of the wafer platform by the intensity of the reflected laser beam.
    Type: Application
    Filed: May 22, 2002
    Publication date: November 27, 2003
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hom-Chung Lin, Song-Yueha Lin, Hu-Li Sun, Chi-Fu Yu, Wu-Han Jiang
  • Publication number: 20030209325
    Abstract: A substrate holding mechanism which is particularly adaptable to automatically centering a semiconductor wafer on a platen spider as the wafer is lowered from a wafer loading and unloading position to a wafer processing position in a medium current implanter such as a Varian EHP500. Upon subsequent placement of a mechanical clamp on the wafer to hold the wafer on the platen, the clamp fingers of the clamp engage the edge of the wafer with substantially uniform pressure to prevent micro-cracking or fracturing of the wafer.
    Type: Application
    Filed: May 7, 2002
    Publication date: November 13, 2003
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chi-Fu Yu, Song-Yueha Lin, Hom-Chung Lin, Zuo-Chang Yen
  • Patent number: 5907895
    Abstract: The present invention provides a wafer tweezer assembling device by utilizing a chuck member and a plurality of tweezer blades separated by spacers having a predetermined thickness such that the mounting and the calibration of the tweezer can be accomplished in one operation without the need of further calibration steps after the assembling process.
    Type: Grant
    Filed: March 3, 1997
    Date of Patent: June 1, 1999
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chi Fu Yu, Hua Ching Hsu