Patents by Inventor Chih-An Huang

Chih-An Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9269749
    Abstract: An organic electroluminescence display panel that includes a plurality of first pixel areas, a plurality of second pixel areas, and a plurality of third pixel areas is provided. The organic electroluminescence display panel includes a first electrode layer, an organic layer including a light-emitting layer made of organic light-emitting material and a second electrode layer. The first electrode layer includes a reflective material. The organic layer is located on the first electrode layer. The second electrode layer is located on the organic layer. The material of the second electrode layer includes a transparent metal oxide conductive material. The thickness of the second electrode layer is a single thickness and is greater than 300 nm.
    Type: Grant
    Filed: July 7, 2014
    Date of Patent: February 23, 2016
    Assignee: Au Optronics Corporation
    Inventors: Chih-An Huang, Hung-Yi Chang, Pei-Ling Lin, Lun Tsai
  • Publication number: 20160005797
    Abstract: An organic electroluminescence display panel that includes a plurality of first pixel areas, a plurality of second pixel areas, and a plurality of third pixel areas is provided. The organic electroluminescence display panel includes a first electrode layer, an organic layer including a light-emitting layer made of organic light-emitting material and a second electrode layer. The first electrode layer includes a reflective material. The organic layer is located on the first electrode layer. The second electrode layer is located on the organic layer. The material of the second electrode layer includes a transparent metal oxide conductive material. The thickness of the second electrode layer is a single thickness and is greater than 300 nm.
    Type: Application
    Filed: July 7, 2014
    Publication date: January 7, 2016
    Inventors: Chih-An Huang, Hung-Yi Chang, Pei-Ling Lin, Lun Tsai
  • Patent number: 7628092
    Abstract: Disclosed herein is a gearshift lock protection mechanism including a gearbox, a gearshift module and a gearshift lock controller. The gearshift module includes a control panel and a gearshift leading wire set. The control panel is combined with a gearbox shaft of the gearbox, shifting gears of the gearbox by using the gearshift leading wire set to control the control panel and the gearbox shaft. Furthermore, a plurality of gear ranges positioning holes are located on the surface of the control panel. The gearshift lock controller includes a control valve which is linked to a gearshift poisoning leading wire, a positioning terminal located at the end of the gearshift positioning leading wire which is in one of the gear ranges positioning holes determined by the control valve, such that it can lock the gear in a particular range and eliminate the gearbox damage.
    Type: Grant
    Filed: January 18, 2007
    Date of Patent: December 8, 2009
    Assignee: Motive Power Industry Co., Ltd.
    Inventors: Jhih-Chao Chen, Shen-Fa Ho, Ting-Shun Wu, Chih-An Huang
  • Publication number: 20080173118
    Abstract: This invention discloses a gearshift lock protection mechanism comprising a gearbox, a gearshift module and a gearshift lock controller. The gearshift module comprises a control panel and a gearshift leading wire set. The control panel is combined with a gearbox shaft of the gearbox, shifting gears of the gearbox by using the gearshift leading wire set to control the control panel and the gearbox shaft, wherein, a plurality of gear ranges positioning holes which are located on the surface of the control panel, the gearshift lock controller comprises a control valve which is linked to a gearshift poisoning leading wire, a positioning terminal located at the end of the gearshift positioning leading wire which is in one of the gear ranges positioning holes determined by the control valve, such that it can lock the gear in a particular range and eliminate the gearbox damage.
    Type: Application
    Filed: January 18, 2007
    Publication date: July 24, 2008
    Inventors: Jhih-Chao Chen, Shen-Fa Ho, Ting-Shun Wu, Chih-An Huang
  • Patent number: 6989337
    Abstract: A silicon oxide gap-filling process is described, wherein a CVD process having an etching effect is performed to fill up a trench with silicon oxide. The reaction gases used in the CVD process include deposition gases and He/H2 mixed gas as a sputtering-etching gas, wherein the percentage of the He/H2 mixed gas in the total reaction gases is raised with the increase of the aspect ratio of the trench.
    Type: Grant
    Filed: October 2, 2003
    Date of Patent: January 24, 2006
    Assignee: United Microelectric Corp.
    Inventors: Hsiu-Chuan Chu, Chih-An Huang, Teng-Chun Tsai, Neng-Kuo Chen
  • Publication number: 20050159007
    Abstract: A manufacturing method of shallow trench isolation (STI) structure is described. A substrate is provided, wherein a patterned pad oxide layer and a mask layer are formed on the substrate, and at least a trench is formed in the substrate, wherein the trench is formed by exposing a portion of the pad oxide layer and the mask layer. Then, a liner layer on a surface of the trench is formed. A high density plasma chemical vapor deposition (HDP-CVD) process is performed to form an isolation layer on the substrate and over the trench, wherein the trench is at least filled with the isolation layer. The HDP-CVD process includes a first stage process and a second stage process. The bias power of the second stage process is larger than the bias power of the first stage process. Thereafter, the isolation layer over the trench, the mask layer and the pad oxide layer are removed sequentially.
    Type: Application
    Filed: January 21, 2004
    Publication date: July 21, 2005
    Inventors: Neng-Kuo Chen, Teng-Chun Tsai, Hsiu-Chuan Chu, Chih-An Huang
  • Patent number: 6913978
    Abstract: A method of fabricating a shallow trench isolation structure is disclosed. On a substrate, a pad oxide layer and a mask layer are successively formed. The pad oxide layer, the mask layer and a portion of the substrate are patterned to form a trench. After performing a rapid wet thermal process, a liner layer is formed on the exposed surface of the substrate, including the exposed silicon surface of the substrate in the trench and sidewalls and the surface of the mask layer. An oxide layer is deposited over the trench and the substrate and fills the trench. A planarization process is performed until the mask layer is exposed. The mask layer and the pad oxide layer are removed to complete the shallow trench isolation structure.
    Type: Grant
    Filed: February 25, 2004
    Date of Patent: July 5, 2005
    Assignee: United Microelectronics Corp.
    Inventors: Neng-Kuo Chen, Hsiu-Chuan Chu, Chih-An Huang, Hsiao-Ling Lu, Teng-Chun Tsai
  • Publication number: 20050074946
    Abstract: A silicon oxide gap-filling process is described, wherein a CVD process having an etching effect is performed to fill up a trench with silicon oxide. The reaction gases used in the CVD process include deposition gases and He/H2 mixed gas as a sputtering-etching gas, wherein the percentage of the He/H2 mixed gas in the total reaction gases is raised with the increase of the aspect ratio of the trench.
    Type: Application
    Filed: October 2, 2003
    Publication date: April 7, 2005
    Inventors: Hsiu-Chuan Chu, Chih-An Huang, Teng-Chun Tsai, Neng-Kuo Chen
  • Patent number: 6764965
    Abstract: A method for improving the coating capability of low dielectric layer is disclosed. The method includes steps of an etching stop layer is deposited a semiconductor substrate, an adhesion promoter layer is spun-on the etching stop layer. The pre-wetting process being performed on the adhesion promoter layer to enhance the coating capability of the low-k dielectric layer, and thus improve the coating quality through the pre-wetting process of baked adhesion promoter layer before the low-k dielectric layer is applied.
    Type: Grant
    Filed: August 17, 2001
    Date of Patent: July 20, 2004
    Assignee: United Microelectronics Corp.
    Inventors: Tsung-Tang Hsieh, Cheng-Yuan Tsai, Chih-An Huang
  • Publication number: 20030035904
    Abstract: A method of coating an organic polymeric low-k dielectric layer starts by depositing a protective layer composed of silicon nitride (SiN) or silicon carbide (SiC) on a substrate. Ahydrophilic surface is produced across a top surface of the protective layer by performing a fast surface treatment that subjects the surface to an oxygen-containing plasma at a pre-selected low radio frequency power. An adhesion promoter coating layer is formed over the top surface of the protective layer. The coating layer has promoter molecules, each promoter molecule having at least one hydrophobic group and one hydrophilic group. The low-k dielectric layer is spin-on coated onto the coating layer. Formation of the hydrophilic surface alters an orientation of the adhesion promoter molecules to facilitate the hydrophilic group of each of the adhesion promoter molecules facing the hydrophilic surface while the hydrophobic group of the adhesion promoter molecules faces the low-k dielectric layer.
    Type: Application
    Filed: August 16, 2001
    Publication date: February 20, 2003
    Inventors: Tsung-Tang Hsieh, Cheng-Yuan Tsai, Hsin-Chang Wu, Chih-An Huang
  • Publication number: 20030036290
    Abstract: A method for improving the coating capability of low dielectric layer is disclosed. The method includes steps of an etching stop layer is deposited a semiconductor substrate, an adhesion promoter layer is spun-on the etching stop layer. The pre-wetting process being performed on the adhesion promoter layer to enhance the coating capability of the low-k dielectric layer, and thus improve the coating quality through the pre-wetting process of baked adhesion promoter layer before the low-k dielectric layer is applied.
    Type: Application
    Filed: August 17, 2001
    Publication date: February 20, 2003
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Tsung-Tang Hsieh, Cheng-Yuan Tsai, Chih-An Huang
  • Patent number: 6521300
    Abstract: A method of coating an organic polymeric low-k dielectric layer starts by depositing a protective layer composed of silicon nitride (SiN) or silicon carbide (SiC) on a substrate. A hydrophilic surface is produced across a top surface of the protective layer by performing a fast surface treatment that subjects the surface to an oxygen-containing plasma at a pre-selected low radio frequency power. An adhesion promoter coating layer is formed over the top surface of the protective layer. The coating layer has promoter molecules, each promoter molecule having at least one hydrophobic group and one hydrophilic group. The low-k dielectric layer is spin-on coated onto the coating layer. Formation of the hydrophilic surface alters an orientation of the adhesion promoter molecules to facilitate the hydrophilic group of each of the adhesion promoter molecules facing the hydrophilic surface while the hydrophobic group of the adhesion promoter molecules faces the low-k dielectric layer.
    Type: Grant
    Filed: August 16, 2001
    Date of Patent: February 18, 2003
    Assignee: United Microelectronics Corp.
    Inventors: Tsung-Tang Hsieh, Cheng-Yuan Tsai, Hsin-Chang Wu, Chih-An Huang