Patents by Inventor Chi-Ho Chang
Chi-Ho Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 11646301Abstract: A display device includes a circuit board and a plurality of light-emitting units disposed on the circuit board. The circuit board includes a substrate and a plurality of signal lines disposed on the substrate. Each light-emitting unit includes a base board, at least one light-emitting element and a driving circuit layer. The light-emitting element is between the base board and the substrate. The driving circuit layer is between the light-emitting element and the base board, and electrically connected to the light-emitting element and the signal line.Type: GrantFiled: October 27, 2021Date of Patent: May 9, 2023Assignee: Au Optronics CorporationInventors: Chi-Ho Chang, Yang-En Wu
-
Publication number: 20230101106Abstract: A display device includes a first substrate, a first circuit structure, and light-emitting element package structures. The first circuit structure is located above the first substrate, and the first circuit structure has holes. Light-emitting element package structures are located above the first circuit structure. Each light-emitting element package structure includes a second substrate and at least one light-emitting element. The light emitting element is located between the second substrate and the first substrate, emitting toward the first circuit substrate, and overlapping with corresponding hole of the first circuit structure. The width of the corresponding hole near the first substrate is greater than the width of the corresponding hole near the second substrate.Type: ApplicationFiled: October 26, 2021Publication date: March 30, 2023Applicant: Au Optronics CorporationInventors: Chi-Ho Chang, Jian-Jhou Tseng
-
Publication number: 20230005894Abstract: A display device includes a circuit board and a plurality of light-emitting units disposed on the circuit board. The circuit board includes a substrate and a plurality of signal lines disposed on the substrate. Each light-emitting unit includes a base board, at least one light-emitting element and a driving circuit layer. The light-emitting element is between the base board and the substrate. The driving circuit layer is between the light-emitting element and the base board, and electrically connected to the light-emitting element and the signal line.Type: ApplicationFiled: October 27, 2021Publication date: January 5, 2023Applicant: Au Optronics CorporationInventors: Chi-Ho Chang, Yang-En Wu
-
Patent number: 11143920Abstract: A display panel including a first substrate, a second substrate, and a display medium layer, a pixel array structure, and a first spacer that are disposed between the first substrate and the second substrate is provided. The pixel array structure includes a first signal line, and has a first platform region located on the first signal line, a first display region and a first support region located between the first platform region and the first display region. A first platform top surface of the first platform region and the first substrate are spaced by a first distance. A support top surface of the first support region and the first substrate are spaced by a second distance. A display top surface of the first display region and the first substrate are spaced by a third distance. A terminal surface of the first spacer contacts the first platform top surface.Type: GrantFiled: November 20, 2019Date of Patent: October 12, 2021Assignee: Au Optronics CorporationInventors: Chi-Ho Chang, An-Cheng Chou, Yu-Chang Wen
-
Patent number: 10985190Abstract: An active device substrate including a substrate and an active device is provided. The active device includes a protrusion, a gate disposed on the protrusion, a semiconductor layer, a gate insulation layer disposed between the gate and the semiconductor layer, a first electrode and a second electrode electrically connected to the semiconductor layer. The protrusion has a first upper surface, a second upper surface, an inner surface and an outer surface. The inner surface and the first upper surface define a concave portion. The inner surface, the second upper surface and the outer surface define a convex portion. The semiconductor layer is disposed on the first upper surface, the inner surface, the second upper surface and the outer surface. The first electrode is disposed on at least one portion of the outer surface. The second electrode is disposed in the concave portion of the protrusion.Type: GrantFiled: November 21, 2018Date of Patent: April 20, 2021Assignee: Au Optronics CorporationInventor: Chi-Ho Chang
-
Publication number: 20200355956Abstract: A display panel including a first substrate, a second substrate, and a display medium layer, a pixel array structure, and a first spacer that are disposed between the first substrate and the second substrate is provided. The pixel array structure includes a first signal line, and has a first platform region located on the first signal line, a first display region and a first support region located between the first platform region and the first display region. A first platform top surface of the first platform region and the first substrate are spaced by a first distance. A support top surface of the first support region and the first substrate are spaced by a second distance. A display top surface of the first display region and the first substrate are spaced by a third distance. A terminal surface of the first spacer contacts the first platform top surface.Type: ApplicationFiled: November 20, 2019Publication date: November 12, 2020Applicant: Au Optronics CorporationInventors: Chi-Ho Chang, An-Cheng Chou, Yu-Chang Wen
-
Patent number: 10629636Abstract: An array substrate including a substrate, pixel structures, color filter patterns, a first common electrode layer, a second common electrode layer, a conductive structure, and a conductive pattern is provided. The substrate has a display area and a peripheral area. Each pixel structure is disposed in the display area and includes an active device and a pixel electrode. The color filter patterns are respectively disposed corresponding to the pixel structures. The first common electrode layer and the second common electrode layer are sequentially disposed on the color filter patterns, and are structurally separated from the pixel electrodes.Type: GrantFiled: January 23, 2019Date of Patent: April 21, 2020Assignee: Au Optronics CorporationInventors: Chi-Ho Chang, Sheng-Chin Fan
-
Publication number: 20200119057Abstract: An array substrate including a substrate, pixel structures, color filter patterns, a first common electrode layer, a second common electrode layer, a conductive structure, and a conductive pattern is provided. The substrate has a display area and a peripheral area. Each pixel structure is disposed in the display area and includes an active device and a pixel electrode. The color filter patterns are respectively disposed corresponding to the pixel structures. The first common electrode layer and the second common electrode layer are sequentially disposed on the color filter patterns, and are structurally separated from the pixel electrodes.Type: ApplicationFiled: January 23, 2019Publication date: April 16, 2020Applicant: Au Optronics CorporationInventors: Chi-Ho Chang, Sheng-Chin Fan
-
Publication number: 20190157306Abstract: An active device substrate including a substrate and an active device is provided. The active device includes a protrusion, a gate disposed on the protrusion, a semiconductor layer, a gate insulation layer disposed between the gate and the semiconductor layer, a first electrode and a second electrode electrically connected to the semiconductor layer. The protrusion has a first upper surface, a second upper surface, an inner surface and an outer surface. The inner surface and the first upper surface define a concave portion. The inner surface, the second upper surface and the outer surface define a convex portion. The semiconductor layer is disposed on the first upper surface, the inner surface, the second upper surface and the outer surface. The first electrode is disposed on at least one portion of the outer surface. The second electrode is disposed in the concave portion of the protrusion.Type: ApplicationFiled: November 21, 2018Publication date: May 23, 2019Applicant: Au Optronics CorporationInventor: Chi-Ho Chang
-
Patent number: 10256258Abstract: A pixel structure and a fabrication method thereof are provided, and the fabrication method includes steps as follows. A gate and a scan line connected to the gate electrode are formed on a substrate. An insulation layer is formed on the substrate and is patterned to form an opening corresponding to the gate electrode. A gate insulation layer is formed to cover the gate electrode and the scan line. A channel layer is formed on the gate insulation layer and is located in the opening. A first ohmic contact layer and a second ohmic contact layer are formed on the channel layer and are located in the opening. A source electrode, a drain electrode and a data line connected to the source electrode are formed on the first ohmic contact layer and the second ohmic contact layer. A first electrode is formed and is electrically connected to the drain electrode.Type: GrantFiled: February 7, 2018Date of Patent: April 9, 2019Assignee: AU OPTRONICS CORPORATIONInventor: Chi-Ho Chang
-
Patent number: 10163937Abstract: A pixel structure includes a scan line, a data line, a bump, an active device, and a pixel electrode electrically connected to the active device. The active device includes a gate, a semiconductor layer, a gate insulation layer between the gate and the semiconductor layer, a source, and a drain. The bump has a top surface and side surfaces in periphery of the top surface. The gate covers the bump and electrically connects the scan line. The semiconductor layer is on the top surface and the side surfaces. The source is on at least one of the side surfaces, in contact with the semiconductor layer, and electrically connected to the data line. The drain is on the top surface and in contact with the semiconductor layer, and the drain does not cover the semiconductor layer on a corner section of the bump between the top surface and the side surfaces.Type: GrantFiled: February 3, 2017Date of Patent: December 25, 2018Assignee: Au Optronics CorporationInventor: Chi-Ho Chang
-
Patent number: 10082566Abstract: A parking space status sensing system is used for detecting a state of a parking space. A parking space status sensing system includes a first antenna array transmitting a first signal, a second antenna array receiving a second signal feedback reflected from an object, a radio-frequency transceiver receiving the second signal and performing down-conversion and demodulation on the second signal with receiving a local signal modulated from a triangularly modulated signal by the radio-frequency transceiver, to generate a first beat frequency signal. An analog-distance-signal-integral information and an analog-speed-signal-integral information of the object are obtained from the first beat frequency signal by related analog signal processes.Type: GrantFiled: February 13, 2017Date of Patent: September 25, 2018Assignee: U&U ENGINEERING INC.Inventors: Chi-Ho Chang, Meng-Xi Wu, Houng-Ti Chiang, Guo-Zhong Lu, Chao-Fu Chiang, Jing-Chung Xu, Sen Wang
-
Publication number: 20180166466Abstract: A pixel structure and a fabrication method thereof are provided, and the fabrication method includes steps as follows. A gate and a scan line connected to the gate electrode are formed on a substrate. An insulation layer is formed on the substrate and is patterned to form an opening corresponding to the gate electrode. A gate insulation layer is formed to cover the gate electrode and the scan line. A channel layer is formed on the gate insulation layer and is located in the opening. A first ohmic contact layer and a second ohmic contact layer are formed on the channel layer and are located in the opening. A source electrode, a drain electrode and a data line connected to the source electrode are formed on the first ohmic contact layer and the second ohmic contact layer. A first electrode is formed and is electrically connected to the drain electrode.Type: ApplicationFiled: February 7, 2018Publication date: June 14, 2018Inventor: Chi-Ho CHANG
-
Patent number: 9941305Abstract: A pixel structure and a fabrication method thereof are provided, and the fabrication method includes steps as follows. A gate and a scan line connected to the gate electrode are formed on a substrate. An insulation layer is formed on the substrate and is patterned to form an opening corresponding to the gate electrode. A gate insulation layer is formed to cover the gate electrode and the scan line. A channel layer is formed on the gate insulation layer and is located in the opening. A first ohmic contact layer and a second ohmic contact layer are formed on the channel layer and are located in the opening. A source electrode, a drain electrode and a data line connected to the source electrode are formed on the first ohmic contact layer and the second ohmic contact layer. A first electrode is formed and is electrically connected to the drain electrode.Type: GrantFiled: September 26, 2016Date of Patent: April 10, 2018Assignee: AU OPTRONICS CORPORATIONInventor: Chi-Ho Chang
-
Publication number: 20170343659Abstract: A parking space status sensing system is used for detecting a state of a parking space. A parking space status sensing system includes a first antenna array transmitting a first signal, a second antenna array receiving a second signal feedback reflected from an object, a radio-frequency transceiver receiving the second signal and performing down-conversion and demodulation on the second signal with receiving a local signal modulated from a triangularly modulated signal by the radio-frequency transceiver, to generate a first beat frequency signal. An analog-distance-signal-integral information and an analog-speed-signal-integral information of the object are obtained from the first beat frequency signal by related analog signal processes.Type: ApplicationFiled: February 13, 2017Publication date: November 30, 2017Inventors: Chi-Ho CHANG, Meng-Xi WU, Houng-Ti CHIANG, Guo-Zhong LU, Chao-Fu CHIANG, Jing-Chung XU, Sen WANG
-
Publication number: 20170263644Abstract: A pixel structure and a fabrication method thereof are provided, and the fabrication method includes steps as follows. A gate and a scan line connected to the gate electrode are formed on a substrate. An insulation layer is formed on the substrate and is patterned to form an opening corresponding to the gate electrode. A gate insulation layer is formed to cover the gate electrode and the scan line. A channel layer is formed on the gate insulation layer and is located in the opening. A first ohmic contact layer and a second ohmic contact layer are formed on the channel layer and are located in the opening. A source electrode, a drain electrode and a data line connected to the source electrode are formed on the first ohmic contact layer and the second ohmic contact layer. A first electrode is formed and is electrically connected to the drain electrode.Type: ApplicationFiled: September 26, 2016Publication date: September 14, 2017Inventor: Chi-Ho CHANG
-
Publication number: 20170229483Abstract: A pixel structure includes a scan line, a data line, a bump, an active device, and a pixel electrode electrically connected to the active device. The active device includes a gate, a semiconductor layer, a gate insulation layer between the gate and the semiconductor layer, a source, and a drain. The bump has a top surface and side surfaces in periphery of the top surface. The gate covers the bump and electrically connects the scan line. The semiconductor layer is on the top surface and the side surfaces. The source is on at least one of the side surfaces, in contact with the semiconductor layer, and electrically connected to the data line. The drain is on the top surface and in contact with the semiconductor layer, and the drain does not cover the semiconductor layer on a corner section of the bump between the top surface and the side surfaces.Type: ApplicationFiled: February 3, 2017Publication date: August 10, 2017Applicant: Au Optronics CorporationInventor: Chi-Ho Chang
-
Patent number: 9678196Abstract: A sensor for detecting a parking space includes a modulating module for supplying a sinusoid wave having a modulation frequency, an active antenna module transmits a FMCW signal based on the modulation frequency and for receiving a reflected FMCW signal, a intermediate-frequency filter for extracting a first demodulating signal having the modulation frequency from the reflected FMCW signal generating modulation signal, a second intermediate-frequency filter for extracting a second demodulating signal having a multiplying frequency of the modulation frequency, an integrator for performing integral operation for the second demodulating signal to generate an integral voltage, a triggering circuit for generating a triggering voltage when the integral voltage is greater than a reference voltage, and a controller for performing operations relating to an existence of a vehicle when receiving the triggering voltage.Type: GrantFiled: July 1, 2015Date of Patent: June 13, 2017Assignee: U&U ENGINEERING INCInventors: Chi-Ho Chang, Chien-Pien Hsieh, Chao-Fu Chiang, Ping-Chang Tsao
-
Two-dimensional antenna array, one-dimensional antenna array and single differential feeding antenna
Patent number: 9614291Abstract: A two-dimensional antenna array has n rows of 1×m one-dimensional array and each one-dimensional array is composed of multiple single differential feeding antennas. Each single differential feeding antenna has a differential feeding structure and a microstrip antenna stripe. A longitudinal length of the microstrip antenna stripe is no longer than one wavelength in a dielectric medium, so the microstrip antenna stripe is not excited to a high-order mode. An angle of inclination of a main beam aligns with the broadside and a width of the main beam is further concentrated at elevation direction. The differential feeding structure can reduce an even mode to enhance an isolation. The one and two-dimensional antenna array is miniature by using the small single differential feeding antennas. Isolation and gain of a dual-antenna system using the two-dimensional or one-dimensional antenna arrays are further enhanced and increased if more feeding antenna arrays are used.Type: GrantFiled: September 4, 2015Date of Patent: April 4, 2017Assignee: U&U ENGINEERING INC.Inventors: Chun-Hao Hu, Chi-Ho Chang, Yo-Sheng Lin, Ping-Chang Tsao -
Patent number: 9590302Abstract: An active antenna module is disclosed. The active antenna module comprises a loop antenna, a RF transistor, a LR series circuit, a first bypass capacitor and a second bypass capacitor. The RF transistor comprises a control port, a first port, and a second port. Each of two ends of the loop antenna is electrically connected to one of the control port and the second port, and the control port and the second port are out of phase. The second port is electrically connected to the first port via the first bypass capacitor. The first port is electrically connected to ground via the LR series circuit. The second bypass capacitor and a resistor of the LR series circuit are connected in parallel.Type: GrantFiled: August 25, 2013Date of Patent: March 7, 2017Assignee: U&U ENGINEERING INC.Inventors: Chi-Ho Chang, Ren-Her Chen, Ping-Chang Tsao, Jen-Chih Huang, Guo-Zhong Lu, Yun-Chun Sung