Abstract: An automated gas supply system includes a gas cylinder transfer unit configured to transfer a cradle in which one or more gas cylinders storing a gas therein are stored; a gas cylinder inspection unit configured to check properties of the gas stored in the gas cylinder transferred from the gas cylinder transfer unit and check whether the gas leaks from the gas cylinder; a storage queue configured to receive the gas cylinder from the gas cylinder inspection unit by a mobile robot and configured to classify and store the transferred gas cylinders according to the properties of the gas stored in the gas cylinder; and a gas cabinet configured to receive the gas cylinder from the storage queue by the mobile robot and fasten a gas pipe, which is connected to a semiconductor manufacturing process line, to a gas spray nozzle, which is disposed at one side of the received gas cylinder, to supply the gas stored in the gas cylinder to the semiconductor manufacturing process line, wherein the gas cabinet includes a resid

Abstract: An analog to digital converter (ADC) can include a multi-input comparison unit configured to compare a pixel voltage from an image sensor, a comparison voltage comprising a stepped voltage modified during a coarse mode of operation, and a ramp voltage comprising a ramped voltage modified to one another during a fine mode of operation, to provide a comparison result signal that indicates whether the comparison voltage combined with the ramp voltage is greater than or less than the pixel voltage. A selection control signal generation unit can receive the comparison result signal and a mode control signal, to indicate the coarse or fine mode, to provide a selection control signal allowing modification of the comparison voltage in the coarse mode and to hold the comparison voltage constant in the fine mode. A reference voltage selection unit can receive the selection control signal to control modification of the comparison voltage.

Abstract: An analog-to-digital converter includes a comparison signal generation unit and a control unit. The comparison signal generation unit determines a logic level of a comparison signal by comparing an input signal with a selected reference signal based on a switch control signal in a first comparison mode, and by comparing a difference voltage with a ramp signal based on the switch control signal in a second comparison mode. The difference voltage is generated based on the input signal and the selected reference signal such that a level of the difference voltage is lower than a fine voltage level corresponding to a voltage level of the selected reference signal in the second comparison mode. The control unit generates the switch control signal based on the comparison signal and a mode selection signal.

Abstract: An analog-to-digital converter including a comparator configured to compare a pixel signal received at a first input terminal of the comparator with a ramp signal received at a second input terminal of the comparator and generate a comparison signal as a result of the comparison; and a ramp signal supply circuit configured to provide the ramp signal to the comparator, wherein the ramp signal supply circuit generates a first signal as part of the ramp signal in response to the comparison signal and a first clock signal being received at the ramp signal supply circuit, wherein a slope of the first signal sequentially changes until the comparison signal makes a transition from one logic level to another and, after the transition, the ramp signal supply circuit generates a second signal as part of the ramp signal, wherein a slope of the second signal sequentially changes, wherein the slope of the second signal is opposite the slope of the first signal.

Abstract: In one embodiment, the counter circuit is associated with a pixel array and includes a plurality of counting circuits. Each counting circuit is configured to receive an associated input signal, and each input signal is associated with a different column of the pixel array. A first of the plurality of counting circuits is configured to count based on the associated input signal. Each subsequent counting circuit in the plurality of counting circuits is configured to count based on a difference between the associated input signal and the input signal associated with a preceding counting circuit.

Abstract: An image sensing apparatus, particularly, an apparatus for optically combining visible images with far-infrared images is provided in which performing a separate signal processing may not be needed. The image combining apparatus emits light that is sensed by an image sensor, and reflects the light toward the image sensor in response to far-infrared rays being sensed from an object, thereby converting far-infrared information into information that can be sensed by the image sensor.

Abstract: An analog to digital converter (ADC) can include a multi-input comparison unit configured to compare a pixel voltage from an image sensor, a comparison voltage comprising a stepped voltage modified during a coarse mode of operation, and a ramp voltage comprising a ramped voltage modified to one another during a fine mode of operation, to provide a comparison result signal that indicates whether the comparison voltage combined with the ramp voltage is greater than or less than the pixel voltage. A selection control signal generation unit can receive the comparison result signal and a mode control signal, to indicate the coarse or fine mode, to provide a selection control signal allowing modification of the comparison voltage in the coarse mode and to hold the comparison voltage constant in the fine mode. A reference voltage selection unit can receive the selection control signal to control modification of the comparison voltage.

Abstract: An analog-to-digital converter includes a comparison signal generation unit and a control unit. The comparison signal generation unit determines a logic level of a comparison signal by comparing an input signal with a selected reference signal based on a switch control signal in a first comparison mode, and by comparing a difference voltage with a ramp signal based on the switch control signal in a second comparison mode. The difference voltage is generated based on the input signal and the selected reference signal such that a level of the difference voltage is lower than a fine voltage level corresponding to a voltage level of the selected reference signal in the second comparison mode. The control unit generates the switch control signal based on the comparison signal and a mode selection signal.

Abstract: In one embodiment, the counter circuit is associated with a pixel array and includes a plurality of counting circuits. Each counting circuit is configured to receive an associated input signal, and each input signal is associated with a different column of the pixel array. A first of the plurality of counting circuits is configured to count based on the associated input signal. Each subsequent counting circuit in the plurality of counting circuits is configured to count based on a difference between the associated input signal and the input signal associated with a preceding counting circuit.

Abstract: An analog-to-digital converter including a comparator configured to compare a pixel signal received at a first input terminal of the comparator with a ramp signal received at a second input terminal of the comparator and generate a comparison signal as a result of the comparison; and a ramp signal supply circuit configured to provide the ramp signal to the comparator, wherein the ramp signal supply circuit generates a first signal as part of the ramp signal in response to the comparison signal and a first clock signal being received at the ramp signal supply circuit, wherein a slope of the first signal sequentially changes until the comparison signal makes a transition from one logic level to another and, after the transition, the ramp signal supply circuit generates a second signal as part of the ramp signal, wherein a slope of the second signal sequentially changes, wherein the slope of the second signal is opposite the slope of the first signal.

Abstract: Disclosed is a passive matrix-addressable memory apparatus. The passive matrix-addressable memory apparatus comprises: a plurality of first electrode lines horizontally arranged with respect to each other; a plurality of second electrode lines disposed orthogonal to the plurality of first electrode lines to be horizontally arranged with respect to each other; a memory unit formed between the plurality of first electrode lines and the plurality of second electrode lines, and containing an electrically polarizable material exhibiting hysteresis; and a switch unit. The switch unit comprises: first electrodes of a cantilever structure respectively formed between the memory unit and the plurality of first electrode lines to be electrically connected to the plurality of first electrode lines; and second electrodes electrically connected to the memory unit to be spaced apart from the first electrodes to face the first electrodes.

Abstract: An image sensing apparatus, particularly, an apparatus for optically combining visible images with far-infrared images is provided in which performing a separate signal processing may not be needed. The image combining apparatus emits light that is sensed by an image sensor, and reflects the light toward the image sensor in response to far-infrared rays being sensed from an object, thereby converting far-infrared information into information that can be sensed by the image sensor.

Abstract: Provided are an optical-infrared composite sensor and a method of fabricating the same. The optical-infrared composite sensor can sense both optical and infrared radiation. The optical-infrared composite sensor includes an infrared sensor formed on a substrate, a silicon cap enveloping the infrared sensor to vacuum-package the infrared sensor, and an optical sensor formed at one side of the silicon cap.

Abstract: Disclosed is a passive matrix-addressable memory apparatus. The passive matrix-addressable memory apparatus comprises: a plurality of first electrode lines horizontally arranged with respect to each other; a plurality of second electrode lines disposed orthogonal to the plurality of first electrode lines to be horizontally arranged with respect to each other; a memory unit formed between the plurality of first electrode lines and the plurality of second electrode lines, and containing an electrically polarizable material exhibiting hysteresis; and a switch unit. The switch unit comprises: first electrodes of a cantilever structure respectively formed between the memory unit and the plurality of first electrode lines to be electrically connected to the plurality of first electrode lines; and second electrodes electrically connected to the memory unit to be spaced apart from the first electrodes to face the first electrodes.

Abstract: The present invention relates to a bolometer, and more specifically to a compensation circuit for compensating non-uniformity due to the difference of operating temperature between bolometers which exist in bolometer array using semiconductor material.