Patents by Inventor Chi Ho Kim

Chi Ho Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12161722
    Abstract: The present invention relates to a novel heterocyclic compound and a composition, for preventing or treating a cancer, an autoimmune disease, and an inflammatory disease, comprising same. The novel heterocyclic compound of the present invention is a bifunctional compound having a Bruton's tyrosine kinase (BTK) degradation function via a ubiquitin proteasome pathway, and may be utilized as a composition for preventing or treating a cancer, an autoimmune disease, and Parkinson's disease.
    Type: Grant
    Filed: June 24, 2022
    Date of Patent: December 10, 2024
    Assignees: KOREA RESEARCH INSTITUTE OF CHEMICAL TECHNOLOGY, UBIX THERAPEUTICS, INC.
    Inventors: Pil Ho Kim, Sung Yun Cho, Jae Du Ha, Chi Hoon Park, Jong Yeon Hwang, Hyun Jin Kim, Song Hee Lee, Ye Seul Lim, Han Wool Kim, Sun Mi Yoo, Beom Seon Suh, Ji Youn Park, Je Ho Ryu, Jung Min Ahn, Hee Jung Moon, Ho Hyun Lee
  • Patent number: 12118996
    Abstract: Disclosed is an electronic device. The electronic device includes a processor configured to execute one or more instructions stored in a memory to: control a receiver to receive a speech signal; determine whether the received speech signal includes speech signals of a plurality of different speakers; when the received speech signal includes the speech signals of the plurality of different speakers, detect feature information from a speech signal of each speaker; determine relations between pieces of speech content of the plurality of different speakers, based on the detected feature information; determine a response method based on the determined relations between the pieces of speech content; and control the electronic device such that an operation of the electronic device is performed according to the determined response method.
    Type: Grant
    Filed: October 27, 2022
    Date of Patent: October 15, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Young Ho Han, Nam Hoon Kim, Jae Young Roh, Chi Youn Park, Kyung Min Lee, Keun Seok Cho, Jong Youb Ryu
  • Patent number: 12107195
    Abstract: A light emitting diode, including a first type semiconductor layer, an active layer, and a second type semiconductor layer; an ohmic contact layer disposed on the second type semiconductor layer; a first insulating layer disposed on the semiconductor structure and including a first opening overlapping the first type semiconductor layer and a second opening overlapping the ohmic contact layer; a first connection wiring disposed on the first insulating layer, the first connection wiring having a first portion and a second portion; and a second connection wiring disposed on the first insulating layer and spaced apart from the first connection wiring, the second connection wiring electrically connected to the second type semiconductor layer through the second opening. The second connection wiring surrounds at least a portion of the first portion of the first connection wiring in a plan view.
    Type: Grant
    Filed: January 17, 2023
    Date of Patent: October 1, 2024
    Assignee: SEOUL VIOSYS CO., LTD.
    Inventors: Chi Hyun In, Jun Yong Park, Kyu Ho Lee, Dae Woong Suh, Jong Hyeon Chae, Chang Hoon Kim, Sung Hyun Lee
  • Publication number: 20240322449
    Abstract: The present invention relate to an antenna apparatus, and more particularly, to an antenna apparatus including an antenna housing part formed in a form of an enclosure opened at a front side thereof, a board assembly disposed to be tightly attached to an internal space defined by the antenna housing part, and a plurality of antenna RF modules arranged on a front surface of the board assembly, in which the antenna housing part is divided into at least three components, and the components are manufactured and then coupled to one another to prevent distortion caused by thermal stress between upper and lower ends due to a difference in heat generation amount between heating elements mounted on the board assembly, thereby preventing the antenna housing part from being distorted by thermal stress caused by imbalance of heat generated from the heating elements, and solving a PIMD problem by preventing an unintended movement and clearance of the internal antenna RF modules.
    Type: Application
    Filed: May 31, 2024
    Publication date: September 26, 2024
    Applicant: KMW INC.
    Inventors: Duk Yong KIM, Sung Hwan SO, Jae Hong KIM, Bo Sung KIM, Sung Ho JANG, Yun Ho LEE, Ji Hun LEE, Young Hun KWON, Yong Won SEO, Jin Sik PARK, Hyoung Seok YANG, Bae Mook JEONG, Kyo Sung JI, Chi Back RYU
  • Publication number: 20240313431
    Abstract: The present invention relates to an RF module for an antenna, and an antenna apparatus comprising same. In particular, the RF module comprises: a unit RF filter body arranged on the front surface of a main board; a radiating element unit disposed on the front surface of the unit RF filter body; and a reflector panel which is formed to be wider than the area of the vertical cross-section of the unit RF filter body while forming the front surface of the unit RF filter body, and grounds (GND) the radiating element unit, wherein a plurality of cavities opened outward to the left and right are respectively formed on the left and right sides of the unit RF filter body, each cavity comprises a left filter unit and a right filter unit which have a built-in resonator so as to perform different frequency filtering, and the left filter unit and the right filter unit are electrically connected to the radiating element unit by passing through the reflector panel.
    Type: Application
    Filed: May 24, 2024
    Publication date: September 19, 2024
    Applicant: KMW INC.
    Inventors: Duk Yong KIM, Sung Hwan SO, Jae Hong KIM, Bo Sung KIM, Sung Ho JANG, Yun Ho LEE, Ji Hun LEE, Young Hun KWON, Yong Won SEO, Jin Sik PARK, Hyoung Seok YANG, Bae Mook JEONG, Kyo Sung JI, Chi Back RYU
  • Publication number: 20240285778
    Abstract: The present invention relates to a novel heterocyclic compound and a composition, for preventing or treating a cancer, an autoimmune disease, and an inflammatory disease, comprising same. The novel heterocyclic compound of the present invention is a bifunctional compound having a Bruton's tyrosine kinase (BTK) degradation function via a ubiquitin proteasome pathway, and may be utilized as a composition for preventing or treating a cancer, an autoimmune disease, and Parkinson's disease.
    Type: Application
    Filed: June 24, 2022
    Publication date: August 29, 2024
    Applicants: KOREA RESEARCH INSTITUTE OF CHEMICAL TECHNOLOGY, UBIX THERAPEUTICS, INC.
    Inventors: Pil Ho KIM, Sung Yun CHO, Jae Du HA, Chi Hoon PARK, Jong Yeon HWANG, Hyun Jin KIM, Song Hee LEE, Ye Seul LIM, Han Wool KIM, Sun Mi YOO, Beom Seon SUH, Ji Youn PARK, Je Ho RYU, Jung Min AHN, Hee Jung MOON, Ho Hyun LEE
  • Patent number: 12063855
    Abstract: Provided are an organic electric element having a first electrode, a second electrode, and at least an organic material layer formed between the first electrode and the second electrode, the organic material layer comprising an emitting layer and the emitting layer comprising a mixture of host materials which improves luminous efficiency, stability, and lifespan of the element; and an organic electronic device comprising the element.
    Type: Grant
    Filed: June 9, 2021
    Date of Patent: August 13, 2024
    Assignee: DUK SAN NEOLUX CO., LTD.
    Inventors: Soung Yun Mun, Sun Hee Lee, Jong Gwang Park, Ki Ho So, Won Sam Kim, Jung Hwan Park, Chi Hyun Park, Mi Young Chae
  • Publication number: 20240251569
    Abstract: A semiconductor device includes: a substrate; a plurality of memory cells positioned over the substrate, each of the plurality of memory cells having a multi-layer structure including a memory pattern; a sealing layer pattern filling a lower portion of a space between the memory cells, the lower portion being positioned below a bottom surface of the memory pattern; a liner layer pattern formed along a surface of an upper portion of the space to partially fill the upper portion; and a dielectric layer pattern filling a remaining portion of the space unfilled by the sealing layer pattern and the liner layer pattern.
    Type: Application
    Filed: July 3, 2023
    Publication date: July 25, 2024
    Inventors: Chi Ho KIM, Kyung Seop KIM, Hun KIM, Young Cheol SONG, Chang Jun YOO, Jae Wan CHOI
  • Publication number: 20240244857
    Abstract: The present disclosure relates to an organic light emitting diode, and an organic light emitting device including the same. An organic light emitting diode includes a first electrode; a second electrode facing the first electrode; and a first emitting part including a first blue emitting material layer and positioned between the first and second electrodes, the first blue emitting material layer including a first blue emitting layer and a second blue emitting layer, wherein the second blue emitting layer is positioned between the first blue emitting layer and the second electrode, wherein the first blue emitting layer includes a first phosphorescent compound, and the second blue emitting layer includes a second phosphorescent compound and a first fluorescent compound, wherein each of the first and second phosphorescent compounds is represented by Formula 5, and wherein the first fluorescent compound is represented by Formula 7.
    Type: Application
    Filed: October 30, 2023
    Publication date: July 18, 2024
    Applicant: LG DISPLAY CO., LTD.
    Inventors: Chi-Ho LEE, Gyeong-Woo KIM, Dong-Ryun LEE, Han-Jin AHN, Jun-Yun KIM
  • Publication number: 20240244937
    Abstract: A display apparatus includes a substrate with a plurality of pixel areas. The display apparatus includes a light-emitting device formed in a pixel area for emitting light. An encapsulation unit is formed on the light-emitting device. The display apparatus includes a black matrix on the encapsulation unit, where an opening in the black matrix overlaps with the light-emitting device in a first direction. An upper surface of the control insulating layer is formed with a groove that is a recessed portion toward the substrate. An optical lens is disposed above the groove in the control insulating layer.
    Type: Application
    Filed: September 5, 2023
    Publication date: July 18, 2024
    Inventors: You Yong Jin, Young Bok Lee, Sung Woo Kim, Keong Jin Lee, Yong Ku Lee, Chi Yong Kim, Won Sik Lee, Se Wan Oh, Seok Ho Ki
  • Publication number: 20240215468
    Abstract: A semiconductor device is provided. The semiconductor device according to an implementation of the disclosed technology may include a variable resistance layer; a selector layer disposed over or under the variable resistance layer; a first protective layer disposed on sidewalls of the variable resistance layer and sidewalls of the selector layer, the first protective layer including silicon (Si) and nitrogen (N) and having a nitrogen (N) content higher than a silicon (Si) content; and a second protective layer disposed over the first protective layer, the second protective layer including silicon (Si) and nitrogen (N) and having a silicon (Si) content higher than a nitrogen (N) content.
    Type: Application
    Filed: July 5, 2023
    Publication date: June 27, 2024
    Inventors: Kyung Seop KIM, Chi Ho Kim, Young Cheol Song, Jae Wan Choi
  • Patent number: 11963467
    Abstract: An electronic device includes a semiconductor memory. A method for fabricating the electronic device includes forming a first memory cell extending vertically from a surface of substrate and having a first upper portion that protrudes laterally, forming a second memory cell extending vertically from the surface of the substrate and having a second upper portion that protrudes laterally towards the first upper portion, and forming a liner layer over the first and second memory cells, the liner layer having a first portion disposed over the first upper portion and a second portion disposed over the second upper portion, the first and second portions of the liner layer contacting each other.
    Type: Grant
    Filed: May 13, 2022
    Date of Patent: April 16, 2024
    Assignee: SK hynix Inc.
    Inventors: Hyo-June Kim, Hyun-Seok Kang, Chi-Ho Kim, Jae-Geun Oh
  • Publication number: 20220278275
    Abstract: An electronic device includes a semiconductor memory. A method for fabricating the electronic device includes forming a first memory cell extending vertically from a surface of substrate and having a first upper portion that protrudes laterally, forming a second memory cell extending vertically from the surface of the substrate and having a second upper portion that protrudes laterally towards the first upper portion, and forming a liner layer over the first and second memory cells, the liner layer having a first portion disposed over the first upper portion and a second portion disposed over the second upper portion, the first and second portions of the liner layer contacting each other.
    Type: Application
    Filed: May 13, 2022
    Publication date: September 1, 2022
    Inventors: Hyo-June KIM, Hyun-Seok KANG, Chi-Ho KIM, Jae-Geun OH
  • Patent number: 11362273
    Abstract: An electronic device includes a semiconductor memory. A method for fabricating the electronic device includes forming a first memory cell extending vertically from a surface of substrate and having a first upper portion that protrudes laterally, forming a second memory cell extending vertically from the surface of the substrate and having a second upper portion that protrudes laterally towards the first upper portion, and forming a liner layer over the first and second memory cells, the liner layer having a first portion disposed over the first upper portion and a second portion disposed over the second upper portion, the first and second portions of the liner layer contacting each other.
    Type: Grant
    Filed: October 22, 2019
    Date of Patent: June 14, 2022
    Assignee: SK hynix Inc.
    Inventors: Hyo-June Kim, Hyun-Seok Kang, Chi-Ho Kim, Jae-Geun Oh
  • Patent number: 11271039
    Abstract: This technology provides an electronic device and a method for fabricating the same. An electronic device in accordance with an implementation of this document may include a substrate including a first portion in a first region and a second portion in a second region; a plurality of memory cells disposed over the first portion of the substrate; a first insulating layer extending over the second portion of the substrate and at least partially filling a space between adjacent ones of the plurality of memory cells; and a second insulating layer disposed over the first insulating layer. The first insulating layer has a dielectric constant smaller than that of the second insulating layer, a thermal conductivity smaller than that of the second insulating layer, or both.
    Type: Grant
    Filed: December 11, 2019
    Date of Patent: March 8, 2022
    Assignee: SK hynix Inc.
    Inventors: Chi-Ho Kim, Min-Seon Kang, Hyun-Seok Kang, Hyo-June Kim, Jae-Geun Oh, Su-Jin Chae
  • Patent number: 10879461
    Abstract: In a method for fabricating an electronic device including a semiconductor memory, the method includes: forming stack structures, each of the stack structures including a variable resistance pattern; forming capping layers on the stack structures, the capping layers including an impurity; forming a gap fill layer between the stack structures; and removing the impurity from the capping layers and densifying the gap fill layer by irradiating the capping layers and the gap fill layer with ultraviolet light.
    Type: Grant
    Filed: December 5, 2019
    Date of Patent: December 29, 2020
    Assignee: SK hynix Inc.
    Inventors: Hyo June Kim, Chi Ho Kim, Sang Hoon Cho, Eung Rim Hwang
  • Publication number: 20200373353
    Abstract: This technology provides an electronic device and a method for fabricating the same. An electronic device in accordance with an implementation of this document may include a substrate including a first portion in a first region and a second portion in a second region; a plurality of memory cells disposed over the first portion of the substrate; a first insulating layer extending over the second portion of the substrate and at least partially filling a space between adjacent ones of the plurality of memory cells; and a second insulating layer disposed over the first insulating layer. The first insulating layer has a dielectric constant smaller than that of the second insulating layer, a thermal conductivity smaller than that of the second insulating layer, or both.
    Type: Application
    Filed: December 11, 2019
    Publication date: November 26, 2020
    Inventors: Chi-Ho KIM, Min-Seon KANG, Hyun-Seok KANG, Hyo-June KIM, Jae-Geun OH, Su-Jin CHAE
  • Publication number: 20200287131
    Abstract: An electronic device includes a semiconductor memory. A method for fabricating the electronic device includes forming a first memory cell extending vertically from a surface of substrate and having a first upper portion that protrudes laterally, forming a second memory cell extending vertically from the surface of the substrate and having a second upper portion that protrudes laterally towards the first upper portion, and forming a liner layer over the first and second memory cells, the liner layer having a first portion disposed over the first upper portion and a second portion disposed over the second upper portion, the first and second portions of the liner layer contacting each other.
    Type: Application
    Filed: October 22, 2019
    Publication date: September 10, 2020
    Inventors: Hyo-June KIM, Hyun-Seok KANG, Chi-Ho KIM, Jae-Geun OH
  • Publication number: 20200111956
    Abstract: In a method for fabricating an electronic device including a semiconductor memory, the method includes: forming stack structures, each of the stack structures including a variable resistance pattern; forming capping layers on the stack structures, the capping layers including an impurity; forming a gap fill layer between the stack structures; and removing the impurity from the capping layers and densifying the gap fill layer by irradiating the capping layers and the gap fill layer with ultraviolet light.
    Type: Application
    Filed: December 5, 2019
    Publication date: April 9, 2020
    Inventors: Hyo June KIM, Chi Ho KIM, Sang Hoon CHO, Eung Rim HWANG
  • Patent number: 10547001
    Abstract: An electronic device may include a semiconductor memory, and the semiconductor memory may include a plurality of memory cells each including a variable resistance layer; a substituted dielectric layer filling a space between the plurality of memory cells; and an unsubstituted dielectric layer disposed adjacent to the variable resistance layer of each of the plurality of memory cells, wherein the unsubstituted dielectric layer may include a flowable dielectric material.
    Type: Grant
    Filed: January 23, 2018
    Date of Patent: January 28, 2020
    Assignee: SK hynix Inc.
    Inventors: Dae-Gun Kang, Su-Jin Chae, Sung-Kyu Min, Myoung-Sub Kim, Chi-Ho Kim, Su-Yeon Lee