Patents by Inventor Chi-Hsing Huang

Chi-Hsing Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11950902
    Abstract: The present invention provides a micro biosensor for reducing a measurement interference when measuring a target analyte in the biofluid, including: a substrate; a first working electrode configured on the surface, and including a first sensing section; a second working electrode configured on the surface, and including a second sensing section which is configured adjacent to at least one side of the first sensing section; and a chemical reagent covered on at least a portion of the first sensing section for reacting with the target analyte to produce a resultant. When the first working electrode is driven by a first working voltage, the first sensing section measures a physiological signal with respect to the target analyte. When the second working electrode is driven by a second working voltage, the second conductive material can directly consume the interferant so as to continuously reduce the measurement inference of the physiological signal.
    Type: Grant
    Filed: July 31, 2020
    Date of Patent: April 9, 2024
    Assignee: Bionime Corporation
    Inventors: Chun-Mu Huang, Chieh-Hsing Chen, Heng-Chia Chang, Chi-Hao Chen, Pi-Hsuan Chen
  • Publication number: 20240113119
    Abstract: The present disclosure describes a method for the formation of gate-all-around nano-sheet FETs with tunable performance. The method includes disposing a first and a second vertical structure with different widths over a substrate, where the first and the second vertical structures have a top portion comprising a multilayer nano-sheet stack with alternating first and second nano-sheet layers. The method also includes disposing a sacrificial gate structure over the top portion of the first and second vertical structures; depositing an isolation layer over the first and second vertical structures so that the isolation layer surrounds a sidewall of the sacrificial gate structure; etching the sacrificial gate structure to expose each multilayer nano-sheet stack from the first and second vertical structures; removing the second nano-sheet layers from each exposed multilayer nano-sheet stack to form suspended first nano-sheet layers; forming a metal gate structure to surround the suspended first nano-sheet layers.
    Type: Application
    Filed: December 1, 2023
    Publication date: April 4, 2024
    Inventors: Tetsu Ohtou, Ching-Wei Tsai, Jiun-Jia Huang, Kuan-Lun Cheng, Chi-Hsing Hsu
  • Patent number: 9484418
    Abstract: The semiconductor device includes a substrate, a first GaN field effect transistor, a second GaN field effect transistor, and a GaN diode. The first GaN field effect transistor is disposed on or above the substrate, and the first GaN field effect transistor is a depletion mode field effect transistor. The second GaN field effect transistor is disposed on or above the substrate, and the second GaN field effect transistor is an enhancement mode field effect transistor. The GaN diode is disposed on or above the substrate. The first GaN field effect transistor, the second GaN field effect transistor, and the GaN diode are disposed on or above a same side of the substrate and electrically connected to each other.
    Type: Grant
    Filed: November 19, 2013
    Date of Patent: November 1, 2016
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Chi-Hsing Huang, Ming-Wei Tsai, Ching-Chuan Shiue, Po-Chin Chuang
  • Publication number: 20140138701
    Abstract: The semiconductor device includes a substrate, a first GaN field effect transistor, a second GaN field effect transistor, and a GaN diode. The first GaN field effect transistor is disposed on or above the substrate, and the first GaN field effect transistor is a depletion mode field effect transistor. The second GaN field effect transistor is disposed on or above the substrate, and the second GaN field effect transistor is an enhancement mode field effect transistor. The GaN diode is disposed on or above the substrate. The first GaN field effect transistor, the second GaN field effect transistor, and the GaN diode are disposed on or above a same side of the substrate and electrically connected to each other.
    Type: Application
    Filed: November 19, 2013
    Publication date: May 22, 2014
    Applicant: DELTA ELECTRONICS, INC.
    Inventors: Chi-Hsing HUANG, Ming-Wei TSAI, Ching-Chuan SHIUE, Po-Chin CHUANG
  • Publication number: 20130320767
    Abstract: A photovoltaic power system includes a plurality of generation modules and a main communication apparatus. Each generation module has a photovoltaic panel assembly, a switch integrated apparatus, and a junction apparatus. The photovoltaic panel assembly has a plurality of photovoltaic panels electrically connected in series. The switch integrated apparatus has a control unit and a switch unit. The junction apparatus is electrically connected between the photovoltaic panel assembly and the switch integrated apparatus to collect electricity generated from the photovoltaic panels and deliver collected electricity to output terminals of the photovoltaic power generation module. The main communication apparatus is connected to the switch integrated apparatuses to turn on or turn off the switch unit according to magnitude of the output voltage, thus controlling continuously delivering electricity or discontinuously delivering electricity generated from the photovoltaic panels.
    Type: Application
    Filed: September 26, 2012
    Publication date: December 5, 2013
    Applicant: DELTA ELECTRONICS, INC.
    Inventors: Chi-Hsing HUANG, Sheng-Hua LI
  • Patent number: 8423806
    Abstract: The present invention relates to a power management system comprising at least one power management subsystem. Each power management subsystem comprises a first power module coupled to a first load and comprising at least one first power supply for supplying power to the first load; a second power module coupled to a second load and comprising at least one second power supply, wherein at least one second power supply is retractably installed in the second power module and selectively coupled to the second load; and a pass-through module comprising at least one pass-through unit retractably installed in the second power module to replace with the at least one second power supply and selectively connecting the first power module to the second load for allowing the first power module to supply power to the second load.
    Type: Grant
    Filed: June 29, 2012
    Date of Patent: April 16, 2013
    Assignee: Delta Electronics, Inc.
    Inventors: Bruce C. H. Cheng, Chi-Hsing Huang, Milan M. Jovanović
  • Publication number: 20120284539
    Abstract: The present invention relates to a power management system comprising at least one power management subsystem. Each power management subsystem comprises a first power module coupled to a first load and comprising at least one first power supply for supplying power to the first load; a second power module coupled to a second load and comprising at least one second power supply, wherein at least one second power supply is retractably installed in the second power module and selectively coupled to the second load; and a pass-through module comprising at least one pass-through unit retractably installed in the second power module to replace with the at least one second power supply and selectively connecting the first power module to the second load for allowing the first power module to supply power to the second load.
    Type: Application
    Filed: June 29, 2012
    Publication date: November 8, 2012
    Applicant: DELTA ELECTRONICS, INC.
    Inventors: Bruce C.H. Cheng, Chi-Hsing Huang, Milan M. Jovanovic
  • Patent number: 8299773
    Abstract: A power supply comprises an input voltage detector that detects a drop in input voltage that corresponds to an input voltage loss. A power converter is coupled to the input voltage detector. The power converter, which may be a boost converter or a power factor correction converter, has a switching device that is actuated in accordance with a duty cycle. A duty cycle adjuster is responsive to detection of the drop in the input voltage to adjust the duty cycle of the switching device in order to limit an input current surge through the switching device below a desired level after the input voltage returns.
    Type: Grant
    Filed: July 10, 2009
    Date of Patent: October 30, 2012
    Assignee: Delta Electronics, Inc.
    Inventors: Yungtaek Jang, Milan M. Jovanovic, Yi-Hsin Leu, Ming-Tsung Hsieh, Wei-Hsin Wen, Chi-Hsing Huang
  • Patent number: 8261102
    Abstract: The present invention relates to a power management system comprising at least one power management subsystem. Each power management subsystem comprises a first power module coupled to a first load and comprising at least one first power supply for supplying power to the first load; a second power module coupled to a second load and comprising at least one second power supply, wherein at least one second power supply is retractably installed in the second power module and selectively coupled to the second load; and a pass-through module comprising at least one pass-through unit retractably installed in the second power module to replace with the at least one second power supply and selectively connecting the first power module to the second load for allowing the first power module to supply power to the second load.
    Type: Grant
    Filed: April 21, 2009
    Date of Patent: September 4, 2012
    Assignee: Delta Electronics, Inc.
    Inventors: Bruce C. H. Cheng, Chi-Hsing Huang, Milan M. Jovanović
  • Patent number: 8004260
    Abstract: A power supply having an specified hold-up time to take a input voltage and convert it to an output voltage, comprising: a first power stage to receive the input voltage; a second power stage to generate the output voltage and an output current; an intermediate charge storage device coupled between the first and second power conversion stages providing an intermediate output voltage in response to the input voltage; and a controller that controls the intermediate output voltage according to a voltage function that is associated with the hold-up time.
    Type: Grant
    Filed: March 26, 2009
    Date of Patent: August 23, 2011
    Assignee: DELTA Electronics, Inc.
    Inventors: Brian T. Irving, Milan M. Jovanović, Sheng-Hua Li, Yung Sheng Yeh, Chi-Hsing Huang
  • Publication number: 20110006748
    Abstract: A power supply comprises an input voltage detector that detects a drop in input voltage that corresponds to an input voltage loss. A power converter is coupled to the input voltage detector. The power converter, which may be a boost converter or a power factor correction converter, has a switching device that is actuated in accordance with a duty cycle. A duty cycle adjuster is responsive to detection of the drop in the input voltage to adjust the duty cycle of the switching device in order to limit an input current surge through the switching device below a desired level after the input voltage returns.
    Type: Application
    Filed: July 10, 2009
    Publication date: January 13, 2011
    Applicant: DELTA ELECTRONICS INC.
    Inventors: Yungtaek Jang, Milan M. Jovanovic, Yi-Hsin Leu, Ming-Tsung Hsieh, Wei-Hsin Wen, Chi-Hsing Huang
  • Publication number: 20100246220
    Abstract: A power supply having an specified hold-up time to take a input voltage and convert it to an output voltage, comprising: a first power stage to receive the input voltage; a second power stage to generate the output voltage and an output current; an intermediate charge storage device coupled between the first and second power conversion stages providing an intermediate output voltage in response to the input voltage; and a controller that controls the intermediate output voltage according to a voltage function that is associated with the hold-up time.
    Type: Application
    Filed: March 26, 2009
    Publication date: September 30, 2010
    Applicant: DELTA ELECTRONICS INC.
    Inventors: Brian T. Irving, Milan M. Jovanovic, Sheng-Hua Li, Yung Sheng Yeh, Chi-Hsing Huang
  • Publication number: 20090271642
    Abstract: The present invention relates to a power management system comprising at least one power management subsystem. Each power management subsystem comprises a first power module coupled to a first load and comprising at least one first power supply for supplying power to the first load; a second power module coupled to a second load and comprising at least one second power supply, wherein at least one second power supply is retractably installed in the second power module and selectively coupled to the second load; and a pass-through module comprising at least one pass-through unit retractably installed in the second power module to replace with the at least one second power supply and selectively connecting the first power module to the second load for allowing the first power module to supply power to the second load.
    Type: Application
    Filed: April 21, 2009
    Publication date: October 29, 2009
    Applicant: DELTA ELECTRONICS, INC.
    Inventors: Bruce C. H. Cheng, Chi-Hsing Huang, Milan M. Jovanovic
  • Publication number: 20060152954
    Abstract: The present invention relates to a current control circuit for controlling inrush current through an energy storage capacitor of a power supply having an input voltage. A semiconductor device is coupled in series to the energy storage capacitor; and a control circuit produces a constant current through the semiconductor device during an inrush current period when the energy storage capacitor is charged by the input voltage to reach an energy storage capacitor voltage that causes the semiconductor device to act as a short switch.
    Type: Application
    Filed: January 7, 2005
    Publication date: July 13, 2006
    Applicant: Delta Electronics, Inc.
    Inventors: Milan Jovanovic, Yungtaek Jang, Chi-Hsing Huang