Patents by Inventor Chi-Hua Huang

Chi-Hua Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240163947
    Abstract: A method for multi-link operation (MLO) is provided. The method for MLO may be applied to an apparatus. The method for MLO may include the following steps. A multi-chip controller of the apparatus may assign different data to a plurality of chips of the apparatus, wherein each chip corresponds to one link of multi-links. Each chip may determine whether transmission of the assigned data has failed. A first chip of the chips may transmit the assigned data to an access point (AP) in response to the first chip determining that the transmission of the assigned data has not failed.
    Type: Application
    Filed: November 8, 2023
    Publication date: May 16, 2024
    Inventors: Cheng-Ying WU, Wei-Wen LIN, Shu-Min CHENG, Hui-Ping TSENG, Chi-Han HUANG, Chih-Chun KUO, Yang-Hung PENG, Hao-Hua KANG
  • Patent number: 11967546
    Abstract: A semiconductor structure includes a first interposer; a second interposer laterally adjacent to the first interposer, where the second interposer is spaced apart from the first interposer; and a first die attached to a first side of the first interposer and attached to a first side of the second interposer, where the first side of the first interposer and the first side of the second interposer face the first die.
    Type: Grant
    Filed: July 21, 2022
    Date of Patent: April 23, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shang-Yun Hou, Hsien-Pin Hu, Sao-Ling Chiu, Wen-Hsin Wei, Ping-Kang Huang, Chih-Ta Shen, Szu-Wei Lu, Ying-Ching Shih, Wen-Chih Chiou, Chi-Hsi Wu, Chen-Hua Yu
  • Patent number: 11955389
    Abstract: A method of determining the reliability of a high-voltage PMOS (HVPMOS) device includes determining a bulk resistance of the HVPMOS device, and evaluating the reliability of the HVPMOS device based on the bulk resistance.
    Type: Grant
    Filed: July 27, 2022
    Date of Patent: April 9, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Chung Chen, Chi-Feng Huang, Tse-Hua Lu
  • Publication number: 20240103220
    Abstract: A device includes a first package connected to an interconnect substrate, wherein the interconnect substrate includes conductive routing; and a second package connected to the interconnect substrate, wherein the second package includes a photonic layer on a substrate, the photonic layer including a silicon waveguide coupled to a grating coupler and to a photodetector; a via extending through the substrate; an interconnect structure over the photonic layer, wherein the interconnect structure is connected to the photodetector and to the via; and an electronic die bonded to the interconnect structure, wherein the electronic die is connected to the interconnect structure.
    Type: Application
    Filed: December 1, 2023
    Publication date: March 28, 2024
    Inventors: Chen-Hua Yu, Hsing-Kuo Hsia, Kuo-Chiang Ting, Sung-Hui Huang, Shang-Yun Hou, Chi-Hsi Wu
  • Patent number: 11865588
    Abstract: A probe pin cleaning pad including a release layer or composite plate, an adhesive layer, a substrate layer, a cleaning layer, and a polishing layer is provided. The adhesive layer is disposed on the release layer or composite plate. The substrate layer is disposed on the adhesive layer. The cleaning layer is disposed on the substrate layer. The polishing layer is disposed on the cleaning layer. A cleaning method for a probe pin is also provided.
    Type: Grant
    Filed: March 10, 2022
    Date of Patent: January 9, 2024
    Assignee: Alliance Material Co., Ltd.
    Inventors: Chun-Fa Chen, Chi-Hua Huang, Yu-Hsuen Lee, Ching-Wen Hsu, Chao-Hsuan Yang, Ting-Wei Lin, Chin-Kai Lin, Chen-Ju Lee
  • Publication number: 20230217383
    Abstract: In an aspect of the disclosure, a method, a computer-readable medium, and an apparatus are provided. The apparatus may be a UE. The UE receives a target SSB from a base station. The UE obtains received data carried in a broadcast channel of the target SSB. The UE reconstructs, based on received data carried in a broadcast channel of a previously received SSB, transmitted data placed in the broadcast channel of the target SSB at the base station. The UE preforms a channel estimation and/or synchronization based on a comparison of the received data and the transmitted data of the target SSB.
    Type: Application
    Filed: December 20, 2022
    Publication date: July 6, 2023
    Inventors: Chunhua Geng, Bohan Zhang, Wei-Jen Chen, Yabo Li, Yen-Chen Chen, Bei-Hao Chang, Qian-Zhi Huang, Chi-Hua Huang
  • Publication number: 20220193733
    Abstract: A probe pin cleaning pad including a release layer or composite plate, an adhesive layer, a substrate layer, a cleaning layer, and a polishing layer is provided. The adhesive layer is disposed on the release layer or composite plate. The substrate layer is disposed on the adhesive layer. The cleaning layer is disposed on the substrate layer. The polishing layer is disposed on the cleaning layer. A cleaning method for a probe pin is also provided.
    Type: Application
    Filed: March 10, 2022
    Publication date: June 23, 2022
    Applicant: Alliance Material Co., Ltd.
    Inventors: Chun-Fa Chen, Chi-Hua Huang, Yu-Hsuen Lee, Ching-Wen Hsu, Chao-Hsuan Yang, Ting-Wei Lin, Chin-Kai Lin, Chen-Ju Lee
  • Publication number: 20210141000
    Abstract: A probe pin cleaning pad is provided, including a release layer or composite plate, an adhesive layer, a substrate layer, and a cleaning layer. The adhesive layer is disposed on the release layer or composite plate. The substrate layer is disposed on the adhesive layer. The cleaning layer is disposed on the substrate layer. A cleaning method for a probe pin is also provided.
    Type: Application
    Filed: November 12, 2020
    Publication date: May 13, 2021
    Applicant: Alliance Material Co., Ltd.
    Inventors: Chun-Fa Chen, Chi-Hua Huang, Yu-Hsuen Lee, Chen-Ju Lee, Huan-Hsuan Ku, Ching-Wen Hsu, Chin-Kai Lin
  • Publication number: 20090202838
    Abstract: A self-assembling optical film structure and a method of manufacturing the same are provided herein. The manufacturing method includes spreading a coating liquid formed with blending an acrylic resin, a fluothane-grafted acrylic resin, and a siloxane-grafted acrylic resin, or the liquid can be formed with an acrylic resin containing a fluorine compound or a silicon compound, so as to form a self-assembling optical film structure on a coated film surface, thus significantly reducing the cost. As a result, random and irregular array is generated during spreading the coating liquid, so we can effectively reduce the generation of optical interference due to the regular structure, and the product thereby has better brightness enhancement property and can be composed of relatively less layers of optical films.
    Type: Application
    Filed: February 13, 2008
    Publication date: August 13, 2009
    Inventors: Chun-Fa CHEN, Cheng-Liang Yen, Chi-Hua Huang
  • Publication number: 20080161268
    Abstract: A quaternary ammonium salt antibacterial is provided, which has a structural formula as follows: in which M represents, for example, Si; R represents a single bond or a C1-C4 alkyl group; R1-R3 are the same or different to each other and represent a C3-C18 alkyl group, respectively; R4 represents a C1-C8 alkyl group or hydrogen; R5-R6, are the same or different to each other and represent a C1-C8 alkyl group, alkoxy group, or hydroxyl group, respectively; and X represents halogen.
    Type: Application
    Filed: July 27, 2007
    Publication date: July 3, 2008
    Applicant: COMPAL ELECTRONICS, INC.
    Inventors: Cheng-Liang Yen, Pei Tien, Ya-Chi Huang, Chi Hua Huang