Patents by Inventor Chi-Jen Hsieh

Chi-Jen Hsieh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250053039
    Abstract: An E-paper display panel including an E-paper display layer, a first substrate, a pixel array layer, a common electrode layer, and a driving circuit is provided. The first substrate is disposed at a first side of the E-paper display layer. The pixel array substrate is disposed between the first substrate and the E-paper display layer and includes touch electrodes and driving pixels arranged in an array. Each driving pixel includes a first pixel electrode and a second pixel electrode. The touch electrodes, the first pixel electrode, and the second pixel electrode are overlapped with each other. The common electrode layer is disposed at a second side of the E-paper display layer. The first side is opposite to the second side. The driving circuit is in signal communication with the common electrode layer and the pixel array layer. The touch electrodes are individually in signal communication with the driving circuit.
    Type: Application
    Filed: July 11, 2024
    Publication date: February 13, 2025
    Applicant: E Ink Holdings Inc.
    Inventors: Chia-Ming Hsieh, Chi-Mao Hung, Sung-Hui Huang, Chuen-Jen Liu, Liang-Yu Yan, Pei Ju Wu, Po-Chun Chuang, Che-Sheng Chang, Wen-Chung Yang
  • Patent number: 10115581
    Abstract: The present disclosure provides a method of cleaning a semiconductor wafer during a process of fabricating a semiconductor device. The method includes loading a semiconductor wafer into a wafer handling system. The method includes removing contaminant particles from an edge region of the wafer from the back side, wherein alignment marks are located in the edge region. The method includes collecting the removed contaminant particles and discarding the collected contaminant particles out of the wafer handling system. The disclosure also provides an apparatus for fabricating a semiconductor device. The apparatus includes a wafer cleaning device that is operable to clean a predetermined region of the wafer on the back surface thereof. The predetermined region of the wafer at least partially overlaps with one or more alignment marks.
    Type: Grant
    Filed: October 17, 2016
    Date of Patent: October 30, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hsun-Peng Lin, Hsin-Kuo Chang, Han-Chih Chung, Yueh-Chih Wang, Chi-Jen Hsieh
  • Patent number: 9720325
    Abstract: A method includes rotating a wafer at a first speed for a first time duration. The wafer is rotated at a second speed that is lower than the first speed for a second time duration after the first time duration. The wafer is rotated at a third speed that is higher than the second speed for a third time duration after the second time duration. A photoresist is dispensed on the wafer during the first time duration and at least a portion of a time interval that includes the second time duration and the third time duration.
    Type: Grant
    Filed: September 17, 2013
    Date of Patent: August 1, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Hsien Hsu, Hong-Hsing Chou, Hu-Wei Lin, Chi-Jen Hsieh, Jr-Wei Ye, Yuan-Ting Huang, Ching-Hsing Chiang, Hua-Kuang Teng, Yen-Chen Lin, Carolina Poe, Tsung-Cheng Huang, Chia-Hung Chu
  • Publication number: 20170040155
    Abstract: The present disclosure provides a method of cleaning a semiconductor wafer during a process of fabricating a semiconductor device. The method includes loading a semiconductor wafer into a wafer handling system. The method includes removing contaminant particles from an edge region of the wafer from the back side, wherein alignment marks are located in the edge region. The method includes collecting the removed contaminant particles and discarding the collected contaminant particles out of the wafer handling system. The disclosure also provides an apparatus for fabricating a semiconductor device. The apparatus includes a wafer cleaning device that is operable to clean a predetermined region of the wafer on the back surface thereof. The predetermined region of the wafer at least partially overlaps with one or more alignment marks.
    Type: Application
    Filed: October 17, 2016
    Publication date: February 9, 2017
    Inventors: Hsun-Peng Lin, Hsin-Kuo Chang, Han-Chih Chung, Yueh-Chih Wang, Chi-Jen Hsieh
  • Publication number: 20150079806
    Abstract: A method includes rotating a wafer at a first speed for a first time duration. The wafer is rotated at a second speed that is lower than the first speed for a second time duration after the first time duration. The wafer is rotated at a third speed that is higher than the second speed for a third time duration after the second time duration. A photoresist is dispensed on the wafer during the first time duration and at least a portion of a time interval that includes the second time duration and the third time duration.
    Type: Application
    Filed: September 17, 2013
    Publication date: March 19, 2015
    Inventors: Chih-Hsien Hsu, Hong-Hsing Chou, Hu-Wei Lin, Chi-Jen Hsieh, Jr-Wei Ye, Yuan-Ting Huang, Ching-Hsing Chiang, Hua-Kuang Teng, Yen-Chen Lin, Carolina Poe, Tsung-Cheng Huang, Chia-Hung Chu
  • Publication number: 20130092186
    Abstract: The present disclosure provides an apparatus for fabricating a semiconductor device. The apparatus includes a mechanical structure that is operable to secure a position of a semiconductor wafer. The wafer has a front surface and a back surface. The apparatus includes a wafer cleaning device that is operable to clean a predetermined region of the wafer on the back surface. The predetermined region of the wafer at least partially overlaps with one or more alignment marks. The present disclosure also provides a method of fabricating a semiconductor device. The method includes loading a semiconductor wafer into a wafer handling system. The method includes removing contaminant particles from an edge region of the wafer from the back side. The alignment marks are located in the edge region. The method includes collecting the removed contaminant particles and discarding the collected contaminant particles out of the wafer handling system.
    Type: Application
    Filed: October 18, 2011
    Publication date: April 18, 2013
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hsun-Peng Lin, Hsin-Kuo Chang, Han-Chih Chung, Yueh-Chih Wang, Chi-Jen Hsieh