Patents by Inventor Chi-Ju Chiang

Chi-Ju Chiang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11991823
    Abstract: The present disclosure is relates to a conductive film and a manufacturing method thereof. The conductive film includes a base layer, a TPU complex layer, a conductive layer and a TPU surface layer. The TPU complex layer includes a TPU heat-resistant layer and a TPU melting layer. The TPU heat-resistant layer is disposed on the TPU melting layer, and the TPU melting layer is disposed on the base layer. The conductive layer includes a conductive circuit disposed on the TPU heat-resistant layer. The TPU surface layer is disposed on the conductive layer. Utilizing the TPU complex layer, the conductive layer does not contact directly with the base layer to avoid breaking the conductive line of the conductive layer when the base layer is pulled. Therefore, the lifetime of the conductive film can be increased.
    Type: Grant
    Filed: May 28, 2021
    Date of Patent: May 21, 2024
    Assignee: SAN FANG CHEMICAL INDUSTRY CO., LTD.
    Inventors: Chih-Yi Lin, Kuo-Kuang Cheng, Chi-Chin Chiang, Wen-Hsin Tai, I-Ju Wu, Chi-Ho Tien
  • Publication number: 20240077914
    Abstract: A foldable electronic device includes a first body having an end and a first inclined surface, a second body having a second inclined surface, and a hinge module. The end includes an accommodating area. A virtual shaft line exists between sides of the first inclined surface and the second inclined surface that are closest to each other. The second body rotates relative to the first body through the virtual shaft line. The hinge module includes a first bracket adjacent to the first inclined surface, connected to the first body, and located in the accommodating area, a second bracket adjacent to the second inclined surface and connected to the second body, and a third bracket including a first end and a second end. The first bracket is connected to the first end through a first torsion assembly. The second bracket is connected to the second end through a second torsion assembly.
    Type: Application
    Filed: April 27, 2023
    Publication date: March 7, 2024
    Applicant: ASUSTeK COMPUTER INC.
    Inventors: Chih-Han Chang, Tsung-Ju Chiang, Chi-Hung Lin, Yen-Ting Liu
  • Publication number: 20030164303
    Abstract: A method of metal-electro-plating for IC package substrate comprising the steps of: forming vias on the package substrate coated with copper film on both sides thereof; electro-plating the vias to form electrical conductive holes between the top layer and the bottom layer of the package substrate; coating a resisting agent where the patterns should be formed on the top layer and on the entire bottom layer of the package substrate; etching the pattern to form circuit without plating lines on the top layer of the substrate, and removing the resisting agent; coating with a resisting agent on the top side and the bottom side of the package substrate but the wiring position to be electro-plated as surface finish for wire-bonding electro-plating on the top side of the package substrate not being applied with the resisting agent; electro-plating the substrate with nickel and gold, and removing the resisting agent; fabricating the circuit on the bottom side of the package substrate and coating with a resisting agent
    Type: Application
    Filed: November 7, 2002
    Publication date: September 4, 2003
    Inventors: Fu-Yu Huang, Yu-Chun Huang, Chin-Hui chuang, Ya-Shin Tseng, Chi-Ju Chiang, Pei-Fen Hung, Wei-Yin Lee, Shu-Hui Lo, Che-Chen Chen