Abstract: The present disclosure provides an oil-scavenge pump, which includes a cap member, a piston member, a resilient member and a filter member. The filter member interconnects the cap member and the piston member. The resilient member is disposed between the cap member and the piston member. The cap member includes a cap head, a pump valve connected to the cap head, a first-resilient unit disposed and a first sphere disposed between the first-resilient unit and the pump valve. The piston member includes a main portion, a piston seat, a second-resilient unit, a second sphere and a rod portion. The piston seat has two ends respectively connected to the piston head and the rod portion. The second-resilient unit and the second sphere are disposed between the piston head and the piston seat. The filter member is mounted to surround the rod portion and engaged with the pump valve.

Abstract: The present disclosure provides an oil scavenge pump, which includes a cap member, a piston member and a resilient member. The cap member and the piston member are connected to each other and with the resilient member therebetween. The cap member includes a cap head, a valve connected to the cap head, a resilient unit disposed between the cap head and the valve, and a first sphere disposed between the resilient unit and the valve. The piston member includes a valve stopper, a main portion, a second sphere, a rod portion, a first-seal ring and a second-seal ring. The main portion has two ends respectively connected to the valve stopper and the rod portion. The second sphere is disposed between the valve stopper and the main portion. The first-seal ring and the second-seal ring respectively surround the main portion and the rod portion.

Abstract: The present disclosure provides an oil-scavenge pump, which includes a cap member, a piston member, a resilient member and a filter member. The filter member interconnects the cap member and the piston member. The resilient member is disposed between the cap member and the piston member. The cap member includes a cap head, a pump valve connected to the cap head, a first-resilient unit disposed and a first sphere disposed between the first-resilient unit and the pump valve. The piston member includes a main portion, a piston seat, a second-resilient unit, a second sphere and a rod portion. The piston seat has two ends respectively connected to the piston head and the rod portion. The second-resilient unit and the second sphere are disposed between the piston head and the piston seat. The filter member is mounted to surround the rod portion and engaged with the pump valve.

Abstract: The present disclosure provides an oil scavenge pump, which includes a cap member, a piston member and a resilient member. The cap member and the piston member are connected to each other and with the resilient member therebetween. The cap member includes a cap head, a valve connected to the cap head, a resilient unit disposed between the cap head and the valve, and a first sphere disposed between the resilient unit and the valve. The piston member includes a valve stopper, a main portion, a second sphere, a rod portion, a first-seal ring and a second-seal ring. The main portion has two ends respectively connected to the valve stopper and the rod portion. The second sphere is disposed between the valve stopper and the main portion. The first-seal ring and the second-seal ring respectively surround the main portion and the rod portion.

Abstract: The present disclosure provides a motor unit and a motor-control device using the same, wherein the motor includes a motor element, a housing and a bearing. The motor element is contained within the housing, the bearing is fastened on a lower-edge portion of the housing and protrudes therefrom. The motor-control device includes a main body, and the motor unit mounted on the main body.

Abstract: A method for fabricating semiconductor device includes the steps of first forming a gate dielectric layer on a substrate; forming a gate material layer on the gate dielectric layer, and removing part of the gate material layer and part of the gate dielectric layer to form a gate electrode, in which a top surface of the gate dielectric layer adjacent to two sides of the gate electrode is lower than a top surface of the gate dielectric layer between the gate electrode and the substrate. Next, a first mask layer is formed on the gate dielectric layer and the gate electrode, part of the first mask layer and part of the gate dielectric layer are removed to form a first spacer, a second mask layer is formed on the substrate and the gate electrode, and part of the second mask layer is removed to forma second spacer.

Abstract: The present invention provides a method of manufacturing a gate stack structure. The method comprises providing a substrate. A dielectric layer is then formed on the substrate and a gate trench is formed in the dielectric layer. A bottom barrier layer, a first work function metal layer and a top barrier layer are formed in the gate trench in sequence. Afterwards, a silicon formation layer is formed on the top barrier layer and filling the gate trench. A planarization process is performed, to remove a portion of the silicon formation layer, a portion of the bottom barrier layer, a portion of the first work function metal layer, and a portion of the top barrier layer. Next, the remaining silicon formation layer is removed completely, and a conductive layer is filled in the gate trench.

Abstract: A method for fabricating semiconductor device includes the steps of first forming a gate dielectric layer on a substrate; forming a gate material layer on the gate dielectric layer, and removing part of the gate material layer and part of the gate dielectric layer to form a gate electrode, in which a top surface of the gate dielectric layer adjacent to two sides of the gate electrode is lower than a top surface of the gate dielectric layer between the gate electrode and the substrate. Next, a first mask layer is formed on the gate dielectric layer and the gate electrode, part of the first mask layer and part of the gate dielectric layer are removed to form a first spacer, a second mask layer is formed on the substrate and the gate electrode, and part of the second mask layer is removed to forma second spacer.

Abstract: A semiconductor device includes a substrate, a gate structure, a spacer, a mask layer, and at least one void. The gate structure is disposed on the substrate, and the gate structure includes a metal gate electrode. The spacer is disposed on sidewalls of the gate structure, and a topmost surface of the spacer is higher than a topmost surface of the metal gate electrode. The mask layer is disposed on the gate structure. At least one void is disposed in the mask layer and disposed between the metal gate electrode and the spacer.

Abstract: A method for fabricating semiconductor device includes the steps of first forming a gate dielectric layer on a substrate; forming a gate material layer on the gate dielectric layer, and removing part of the gate material layer and part of the gate dielectric layer to form a gate electrode, in which a top surface of the gate dielectric layer adjacent to two sides of the gate electrode is lower than a top surface of the gate dielectric layer between the gate electrode and the substrate. Next, a first mask layer is formed on the gate dielectric layer and the gate electrode, part of the first mask layer and part of the gate dielectric layer are removed to form a first spacer, a second mask layer is formed on the substrate and the gate electrode, and part of the second mask layer is removed to form a second spacer.

Abstract: The present invention provides a method of manufacturing a gate stack structure. The method comprises providing a substrate. A dielectric layer is then formed on the substrate and a gate trench is formed in the dielectric layer. A bottom barrier layer, a first work function metal layer and a top barrier layer are formed in the gate trench in sequence. Afterwards, a silicon formation layer is formed on the top barrier layer and filling the gate trench. A planarization process is performed, to remove a portion of the silicon formation layer, a portion of the bottom barrier layer, a portion of the first work function metal layer, and a portion of the top barrier layer. Next, the remaining silicon formation layer is removed completely, and a conductive layer is filled in the gate trench.

Abstract: A method for fabricating semiconductor device includes the steps of first forming a gate dielectric layer on a substrate; forming a gate material layer on the gate dielectric layer, and removing part of the gate material layer and part of the gate dielectric layer to form a gate electrode, in which a top surface of the gate dielectric layer adjacent to two sides of the gate electrode is lower than a top surface of the gate dielectric layer between the gate electrode and the substrate. Next, a first mask layer is formed on the gate dielectric layer and the gate electrode, part of the first mask layer and part of the gate dielectric layer are removed to form a first spacer, a second mask layer is formed on the substrate and the gate electrode, and part of the second mask layer is removed to form a second spacer.

Abstract: The present invention provides a method of manufacturing a gate stack structure. The method comprises providing a substrate. A dielectric layer is then formed on the substrate and a gate trench is formed in the dielectric layer. A bottom barrier layer, a first work function metal layer and a top barrier layer are formed in the gate trench in sequence. Afterwards, a silicon formation layer is formed on the top barrier layer and filling the gate trench. A planarization process is performed, to remove a portion of the silicon formation layer, a portion of the bottom barrier layer, a portion of the first work function metal layer, and a portion of the top barrier layer. Next, the remaining silicon formation layer is removed completely, and a conductive layer is filled in the gate trench.

Abstract: A semiconductor device includes a substrate, a gate structure, a spacer, a mask layer, and at least one void. The gate structure is disposed on the substrate, and the gate structure includes a metal gate electrode. The spacer is disposed on sidewalls of the gate structure, and a topmost surface of the spacer is higher than a topmost surface of the metal gate electrode. The mask layer is disposed on the gate structure. At least one void is disposed in the mask layer and disposed between the metal gate electrode and the spacer.

Abstract: A semiconductor device includes a substrate, a metal gate on the substrate, and a first inter-layer dielectric (ILD) layer around the metal gate. A top surface of the metal gate is lower than a top surface of the ILD layer thereby forming a recessed region atop the metal gate. A mask layer is disposed in the recessed region. A void is formed in the mask layer within the recessed region. A second ILD layer is disposed on the mask layer and the first ILD layer. A contact hole extends into the second ILD layer and the mask layer. The contact hole exposes the top surface of the metal gate and communicates with the void. A conductive layer is disposed in the contact hole and the void.

Abstract: The present invention provides a method of manufacturing a gate stack structure. The method comprises providing a substrate. A dielectric layer is then formed on the substrate and a gate trench is formed in the dielectric layer. A bottom barrier layer, a first work function metal layer and a top barrier layer are formed in the gate trench in sequence. Afterwards, a silicon formation layer is formed on the top barrier layer and filling the gate trench. A planarization process is performed, to remove a portion of the silicon formation layer, a portion of the bottom barrier layer, a portion of the first work function metal layer, and a portion of the top barrier layer. Next, the remaining silicon formation layer is removed completely, and a conductive layer is filled in the gate trench.

Abstract: A semiconductor device includes a substrate, a gate structure, a spacer, a mask layer, and at least one void. The gate structure is disposed on the substrate, and the gate structure includes a metal gate electrode. The spacer is disposed on sidewalls of the gate structure, and a topmost surface of the spacer is higher than a topmost surface of the metal gate electrode. The mask layer is disposed on the gate structure. At least one void is disposed in the mask layer and disposed between the metal gate electrode and the spacer.

Abstract: A field-effect transistor includes a substrate having thereon an isolation region. A fin structure protrudes from a top surface of the isolation region. The fin structure extends along a first direction. A gate electrode strides across the fin structure and extends along a second direction. A fin corner layer wraps a lower portion of the gate electrode around the fin structure. A spacer covers a sidewall of the gate electrode and the fin corner layer.

Abstract: A method of preventing contact metal from protruding into neighboring gate devices to affect work functions of the neighboring gate devices is provided includes forming a gate structure. Forming the gate structure includes forming a work function layer, and forming a gate metal layer having a void, wherein the work function layer surrounds the gate metal layer. The method further includes forming a contact plug having a contact metal directly on the gate metal layer of the first gate stack, wherein the contact metal protrudes into the void, and the work function layer prevents the contact metal from protruding into a second gate stack.

Abstract: The present invention provides a metal gate structure which is formed in a trench of a dielectric layer. The metal gate structure includes a work function metal layer and a metal layer. The work function metal layer is disposed in the trench and comprises a bottom portion and a side portion, wherein a ratio between a thickness of the bottom portion and a thickness of the side portion is between 2 and 5. The trench is filled with the metal layer. The present invention further provides a method of forming the metal gate structure.