Patents by Inventor Chi Jung Lo

Chi Jung Lo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11720162
    Abstract: A method of adjusting power consumption of a server is implemented by a baseboard management controller (BMC). The server includes the BMC and a processing module that are connected to each other. The BMC is connected to a power supply for receiving electrical energy supplied thereby, and the processing module operates based on the electrical energy thus received according to a current setting value of a power consumption limit. The method includes steps of: obtaining consecutive values of power conveyed by the power supply to the server; and based on the values of power currently obtained, adjusting the current setting value of the power consumption limit to be within a defined range.
    Type: Grant
    Filed: November 29, 2021
    Date of Patent: August 8, 2023
    Assignee: MITAC COMPUTING TECHNOLOGY CORPORATION
    Inventor: Chi-Jung Lo
  • Publication number: 20220179476
    Abstract: A method of adjusting power consumption of a server is implemented by a baseboard management controller (BMC). The server includes the BMC and a processing module that are connected to each other. The BMC is connected to a power supply for receiving electrical energy supplied thereby, and the processing module operates based on the electrical energy thus received according to a current setting value of a power consumption limit. The method includes steps of: obtaining consecutive values of power conveyed by the power supply to the server; and based on the values of power currently obtained, adjusting the current setting value of the power consumption limit to be within a defined range.
    Type: Application
    Filed: November 29, 2021
    Publication date: June 9, 2022
    Inventor: Chi-Jung LO
  • Patent number: 7538450
    Abstract: A power switch device and method for a cluster computer is described. A power input circuit receives plural input powers and plural state signals corresponding to the input powers. A first output circuit supplies the input powers to a head node and at least one compute node. A second output circuit supplies the input powers to the head node. A gate produces a switch signal according to the state signals. According to the switch signal, a switch module connects the power input circuit to the first output circuit or the second output circuit. And a spare power module, connected to the first and second output circuits, stores a spare power charged from the first output circuit and supplies the spare power to the second output circuit during a switch period.
    Type: Grant
    Filed: September 27, 2006
    Date of Patent: May 26, 2009
    Assignee: Mitac International Corp.
    Inventors: John McClure, Chi Jung Lo
  • Publication number: 20070290663
    Abstract: A power switch device and method for a cluster computer is described. A power input circuit receives plural input powers and plural state signals corresponding to the input powers. A first output circuit supplies the input powers to a head node and at least one compute node. A second output circuit supplies the input powers to the head node. A gate produces a switch signal according to the state signals. According to the switch signal, a switch module connects the power input circuit to the first output circuit or the second output circuit. And a spare power module, connected to the first and second output circuits, stores a spare power charged from the first output circuit and supplies the spare power to the second output circuit during a switch period.
    Type: Application
    Filed: September 27, 2006
    Publication date: December 20, 2007
    Applicant: Tyan Computer Corporation
    Inventors: John McClure, Chi Jung Lo
  • Publication number: 20070214299
    Abstract: A computing system and an I/O board thereof are disclosed. The computing system comprises at least a processor card including at least a processor unit, an expansion board including at least an expansion socket, and the I/O board including a south bridge chip, an I/O controller, and a plurality of I/O ports. The processor card, the I/O board, and the expansion board can be coupled by at least a processor unit bus connector and a plurality of interconnection bus connectors so as to enable the south bridge chip to communicate with the processor unit and the expansion socket.
    Type: Application
    Filed: May 12, 2006
    Publication date: September 13, 2007
    Inventor: Chi-Jung Lo