Patents by Inventor Chi Kim

Chi Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12162951
    Abstract: In certain aspects, the disclosure relates to anti-idiotype antibodies and antigen-binding portions thereof that specifically bind a KL2B413 containing protein, e.g., an antibody or antigen-binding portions thereof. In some aspects, the anti-idiotype antibodies and antigen-binding portions of the present disclosure can be used in methods to detect and quantify cells expressing chimeric antigen receptors that include KL2B413.
    Type: Grant
    Filed: July 15, 2021
    Date of Patent: December 10, 2024
    Assignee: Janssen Biotech, Inc.
    Inventors: Zemeda Ainekulu, Qiang Chen, Ellen Chi, Wilson Edwards, Matt Husovsky, Ann Lacombe, Quynh Nguyen, Paul H. Kim, H. Mimi Zhou, John T. Lee
  • Publication number: 20240381724
    Abstract: A display may have a stretchable portion with hermetically sealed rigid pixel islands. A flexible interconnect region may be interposed between the hermetically sealed rigid pixel islands. The hermetically sealed rigid pixel islands may include organic light-emitting diode (OLED) pixels. A conductive cutting structure may have an undercut that causes a discontinuity in a conductive OLED layer to mitigate lateral leakage. The conductive cutting structure may also be electrically connected to a cathode for the OLED pixels and provide a cathode voltage to the cathode. First and second inorganic passivation layers may be formed over the OLED pixels. Multiple discrete portions of an organic inkjet printed layer may be interposed between the first and second inorganic passivation layers.
    Type: Application
    Filed: July 25, 2024
    Publication date: November 14, 2024
    Inventors: Prashant Mandlik, Bhadrinarayana Lalgudi Visweswaran, Xuesong Lu, Weixin Li, Wenbing Hu, Yuchi Che, Tsung-Ting Tsai, Gihoon Choo, Shyuan Yang, Kuan-Yi Lee, An-Di Sheu, Chi-Wei Chou, Chin-Fu Lee, An-Hong Shen, Ko-Wei Chen, Kyounghwan Kim, Jae Won Choi, Warren S. Rieutort-Louis, Sungki Lee
  • Publication number: 20240368087
    Abstract: Provided is a compound of formula (I) in which Ar1, R1, U, V, W, X, and p are as described herein. Also provided are methods of using a compound of formula (I), including a method of treating cancer, a method of treating a patient with cancer cells resistant to an anti-cancer agent, and a method of inhibiting lactate dehydrogenase A (LDHA) and/or lactate dehydrogenase B (LDHB) activity in a cell.
    Type: Application
    Filed: February 5, 2024
    Publication date: November 7, 2024
    Inventors: David J. MALONEY, Alex Gregory WATERSON, Ganesh Rai BANTUKALLU, Kyle Ryan BRIMACOMBE, Plamen CHRISTOV, Chi V. DANG, Victor DARLEY-USMAR, Xin HU, Ajit JADHAV, Somnath JANA, Kwangho KIM, Jennifer L. KOUZNETSOVA, William J. MOORE, Bryan T. MOTT, Leonard M. NECKERS, Anton SIMEONOV, Gary Allen SULIKOWSKI, Daniel Jason URBAN, Shyh Ming YANG
  • Publication number: 20240367398
    Abstract: Methods of fabricating infrared bandpass filters and infrared bandpass filters fabricated thereby. The methods include forming metallic and dielectric spacer layers on a mold that defines nanoscale-sized recesses or protuberances, depositing a stress-absorbing layer on the dielectric spacer layer opposite the mold, and applying a force to the stress-absorbing layer to peel a first intermediate structure comprising the metallic layer, the dielectric spacer layer, and the stress-absorbing layer from the mold. The stress-absorbing layer may be dissolved from the first intermediate structure with a solvent to define a second intermediate structure. The second intermediate structure may be transferred to a receiver substrate to define the IR bandpass filter. The recesses or protuberances of the metallic and dielectric spacer layers are configured to function as quasi-three-dimensional (quasi-3D) plasmonic metal-dielectric hybrid nanostructures.
    Type: Application
    Filed: October 21, 2022
    Publication date: November 7, 2024
    Inventors: Chi Hwan Lee, Bongjoong Kim, Zahyun Ku, Augustine Urbas, Jehwan Hwang
  • Patent number: 12112468
    Abstract: An apparatus for detecting a dimension error obtains an image of a target object, estimates dimensional data for a region of interest (ROI) for which dimensions are to be measured from the image of the target object using a learned dimensional measurement model, and determines whether there is a dimension error in the ROI from the estimated dimension data using a learned dimension error determination model.
    Type: Grant
    Filed: January 29, 2021
    Date of Patent: October 8, 2024
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Hye-Jin Kim, Suyoung Chi
  • Publication number: 20240333072
    Abstract: A blower motor includes a motor assembly 100 including a stator assembly 1 comprising a stator core 10, an upper insulator 11 coupled to an upper portion of the stator core 10 and a lower insulator 12 coupled to a lower portion of the stator core 10, a rotor assembly 2 rotating around the stator assembly 1, a stator block 3 to which the stator assembly 1 is coupled, a printed circuit board 4 located at a lower portion of the stator block 3, and a motor cover 5 coupled to the stator block 3; a flange 200; and a damper plate 300.
    Type: Application
    Filed: March 27, 2024
    Publication date: October 3, 2024
    Applicant: Hyoseong Electric, Co., Ltd.
    Inventors: Jin Gun JUNG, Chi Won MOON, Seokmin KIM
  • Publication number: 20240333063
    Abstract: A blower motor according to the present invention includes a stator assembly 1 including a stator core 10, an upper insulator 11 coupled to an upper portion of the stator core 10, and a lower insulator 12 coupled to a lower portion of the stator core 10; a rotor assembly 2 rotating around the stator assembly 1; a stator block 3 to which the stator assembly 1 is coupled; a printed circuit board 4 located at a lower portion of the stator block 3; and a motor cover 5 coupled to the stator block 3.
    Type: Application
    Filed: March 27, 2024
    Publication date: October 3, 2024
    Applicant: Hyoseong Electric, Co., Ltd.
    Inventors: Jin Gun JUNG, Chi Won MOON, Seokmin KIM
  • Publication number: 20240333088
    Abstract: A blower motor includes a motor assembly 100; a flange 200 on which the motor assembly 100 is mounted; and a damper plate 300 coupled to the flange 200 and supporting the motor assembly 100, wherein the motor assembly 100 includes: a stator assembly 20; a rotor assembly 30 disposed on an outer periphery of the stator assembly 20 and rotating with a shaft 10; a stator block 40 coupled to the stator assembly 20; a printed circuit board 50 installed in the stator block 40; and a motor cover 60 coupled to the stator block 40.
    Type: Application
    Filed: March 27, 2024
    Publication date: October 3, 2024
    Applicant: Hyoseong Electric, Co., Ltd.
    Inventors: Jin Gun JUNG, Chi Won MOON, Seokmin KIM
  • Publication number: 20240333084
    Abstract: A blower motor includes a motor assembly 100 including a stator assembly 1 comprising a stator core 10, an upper insulator 11 coupled to an upper portion of the stator core 10 and a lower insulator 12 coupled to a lower portion of the stator core 10, a rotor assembly 2 rotating around the stator assembly 1, a stator block 3 to which the stator assembly 1 is coupled, a printed circuit board 4 located at a lower portion of the stator block 3, and a motor cover 5 coupled to the stator block 3; a flange 200; and a damper plate 300.
    Type: Application
    Filed: March 27, 2024
    Publication date: October 3, 2024
    Applicant: Hyoseong Electric, Co., Ltd.
    Inventors: Jin Gun JUNG, Chi Won MOON, Seokmin KIM
  • Publication number: 20240306102
    Abstract: A method includes receiving, at a first device via a first radio, a trigger from a second device, the first device configured for wireless communication using multiple radios sharing a clock, the multiple radios comprising the first radio and a second radio, the trigger including a timing indication. The method also includes determining, based on the timing indication in the trigger and a time of reception of the trigger, a timing of one or more operations of a radio of the second device for a discovery session between the first device and the second device. The method further includes starting the discovery session with the second device based on the determined timing of the one or more operations.
    Type: Application
    Filed: December 29, 2023
    Publication date: September 12, 2024
    Inventors: Bilal Sadiq, Boon Loong Ng, Junsung Kim, Chi Ho Kim, Soonho Lee, Bu-Seop Jung
  • Patent number: 12068554
    Abstract: A dual-path signal interconnect is provided. The interconnect can include a first signal trace, first and second solder pads positioned above and connected to the first signal trace, and a third solder pad. The second solder pad separates from the first solder pad. The third solder pad separates from the second solder pad and is connected to a second signal trace. The first and second solder pads are to allow a pin of a connector to be soldered to the first and second solder pads, such that, when the pin of the external connector is soldered, high-speed electrical signals from the first signal trace are routed to the connector. The second and third solder pads are to allow a conductor to be soldered to the second and third solder pads, such that, when the conductor is soldered, the high-speed electrical signals are routed to the second signal trace.
    Type: Grant
    Filed: January 28, 2022
    Date of Patent: August 20, 2024
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Paul Danna, Vincent W. Michna, Chi Kim Sides
  • Publication number: 20240250402
    Abstract: The present invention relates to a clamping apparatus for an antenna device and, particularly, to a clamping apparatus comprising: two or more clamping block bodies tightly combined to occupy a part of the outer surface of a support pole having a horizontal cross section in various shapes; and a clamping band coupled so as to pass through the two or more clamping block bodies, the clamping band coupling by fastening the two or more clamping block bodies to the outer surface of the support pole, wherein each of the two or more clamping block bodies has a detachable clamping gear plate having gear teeth which come in close contact with the outer surface of the support pole, thereby providing the advantage of enhancing general use with respect to replacement installation.
    Type: Application
    Filed: March 12, 2024
    Publication date: July 25, 2024
    Applicant: KMW INC.
    Inventors: In Ho KIM, Kyo Sung JI, Chi Back RYU, Hee KIM, Duk Yong KIM
  • Publication number: 20240098898
    Abstract: One aspect provides a printed circuit board (PCB). The PCB can include a plurality of layers and a plurality of plated through-hole (PTH) vias extending through the plurality of layers. The plurality of layers can include at least a top layer for mounting components, a second surface layer, and a first power layer positioned between the top layer and the second surface layer. The plurality of PTH vias can include at least one power via coupled to the first power layer to provide power to components mounted on the top layer. A stub length of the power via can be less than a distance between the power layer and the second surface layer.
    Type: Application
    Filed: September 21, 2022
    Publication date: March 21, 2024
    Inventors: Melvin Kent Benedict, Chi Kim Sides, Paul Danna, Michael Chan
  • Patent number: 11937373
    Abstract: One aspect of the instant application provides techniques to reduce the amount of crosstalk on single-ended signals in the pin field region of an integrated circuit device on a printed circuit board (PCB). The PCB can include a plurality of layers and an array of vias comprising a plurality of rows configured to route signals across layers. An inner layer of the PCB can include first and second signal traces positioned between first and second adjacent rows of the vias, the first signal trace positioned adjacent to the first row and the second signal trace positioned adjacent to the second row. The first signal trace can include at least one curved segment that curves around a substantial portion of a corresponding via in the first row such that separation between the first and second signal traces varies along the curved segment.
    Type: Grant
    Filed: March 8, 2022
    Date of Patent: March 19, 2024
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Melvin K. Benedict, Paul Danna, Chi Kim Sides, Wayne Vuong, Michael Chan
  • Patent number: 11860830
    Abstract: Columns of a table are stored in either row-major format or column-major format in an in-memory DBMS. For a given table, one set of columns is stored in column-major format; another set of columns for a table are stored in row-major format. This way of storing columns of a table is referred to herein as dual-major format. In addition, a row in a dual-major table is updated “in-place”, that is, updates are made directly to column-major columns without creating an interim row-major form of the column-major columns of the row. Users may submit database definition language (“DDL”) commands that declare the row-major columns and column-major columns of a table.
    Type: Grant
    Filed: February 27, 2019
    Date of Patent: January 2, 2024
    Assignee: Oracle International Corporation
    Inventors: Tirthankar Lahiri, Martin A. Reames, Kirk Edson, Neelam Goyal, Kao Makino, Anindya Patthak, Dina Thomas, Subhradyuti Sarkar, Chi-Kim Hoang, Qingchun Jiang
  • Patent number: 11829349
    Abstract: A database is stored as a plurality of database shards in a distributed database grid comprising a plurality of grid elements, each including a mid-tier database system. A first grid element receives, from an application executing in the same memory as a mid-tier database system of the first grid element, a first database transaction including at least one database operation on specific data stored in a first database shard that belongs to the first grid element. The first grid element performs and commits the first database transaction without participation of another grid element of the plurality of grid elements. The first grid element receives a second database transaction that requires access to another database shard that does not belong to the first grid element. Multiple grid elements of the plurality of grid elements perform the second database transaction and commit the second database transaction using a two-phase commit protocol.
    Type: Grant
    Filed: May 11, 2015
    Date of Patent: November 28, 2023
    Assignee: Oracle International Corporation
    Inventors: Tirthankar Lahiri, Derek Taylor, Nagender Bandi, John Miller, Chi-Kim Hoang, Ryder Rishel, Varadarajan Aravamudhan, Chih-Ping Wang, Susan Cheung, Samuel Drake, Paul Tuck, David Aspinwall
  • Publication number: 20230292436
    Abstract: One aspect of the instant application provides techniques to reduce the amount of crosstalk on single-ended signals in the pin field region of an integrated circuit device on a printed circuit board (PCB). The PCB can include a plurality of layers and an array of vias comprising a plurality of rows configured to route signals across layers. An inner layer of the PCB can include first and second signal traces positioned between first and second adjacent rows of the vias, the first signal trace positioned adjacent to the first row and the second signal trace positioned adjacent to the second row. The first signal trace can include at least one curved segment that curves around a substantial portion of a corresponding via in the first row such that separation between the first and second signal traces varies along the curved segment.
    Type: Application
    Filed: March 8, 2022
    Publication date: September 14, 2023
    Inventors: Melvin K. Benedict, Paul Danna, Chi Kim Sides, Wayne Vuong, Michael Chan
  • Publication number: 20230246353
    Abstract: A dual-path signal interconnect is provided. The interconnect can include a first signal trace, first and second solder pads positioned above and connected to the first signal trace, and a third solder pad. The second solder pad separates from the first solder pad. The third solder pad separates from the second solder pad and is connected to a second signal trace. The first and second solder pads are to allow a pin of a connector to be soldered to the first and second solder pads, such that, when the pin of the external connector is soldered, high-speed electrical signals from the first signal trace are routed to the connector. The second and third solder pads are to allow a conductor to be soldered to the second and third solder pads, such that, when the conductor is soldered, the high-speed electrical signals are routed to the second signal trace.
    Type: Application
    Filed: January 28, 2022
    Publication date: August 3, 2023
    Inventors: Paul Danna, Vincent W. Michna, Chi Kim Sides
  • Publication number: 20220379217
    Abstract: This invention relates generally to a software-enabled, computer-implemented neural processing system for a non-player character (NPC) in a computer-enabled virtual environment. The system includes a plurality of virtual sensors configured to detect one or more virtual stimuli presented by the virtual environment to the NPC and present corresponding stimuli detection signals in response to the one or more virtual stimuli. The neural processing system may also include a virtual neo cortex, which may include a plurality of processing modules that are each configured to process stimuli detection signals output from the plurality of virtual sensors. The neural processing system also may include a virtual thalamus module configured to receive the stimuli detection signals and transmit the stimuli detection signals to the appropriate processing modules of the virtual neo cortex.
    Type: Application
    Filed: May 31, 2022
    Publication date: December 1, 2022
    Applicant: Human Mode, L.L.C.
    Inventors: Chi Kim Kerber, William Xavier Kerber
  • Patent number: 11188516
    Abstract: An approach for consistent database recovery for distributed database systems uses “synchronization points”. A synchronization point is a global timestamp for which across all nodes of a distributed database system, the nodes have stored change records for any transaction occurring at and before the synchronization point in persistent logs. Each node may employ asynchronous flushing. However, on a periodic basis, each node coordinates to establish a synchronization point, which may entail ensuring change records for transactions that committed at or before the synchronization point are stored in persistent logs. In effect, a synchronization point represents that any transaction committed at or before the synchronization point has been durably committed.
    Type: Grant
    Filed: July 25, 2019
    Date of Patent: November 30, 2021
    Assignee: Oracle International Corproation
    Inventors: Derek Taylor, Chi-Kim Hoang, Yu-Han Chou, Varadarajan Aravamudhan