Patents by Inventor Chi Kuen Vincent Leung

Chi Kuen Vincent Leung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8544165
    Abstract: A method of aligning electronic components comprising providing a positioning member 110 having at least one formation 120 for receiving an electronic component; said at least one formation having lateral boundaries 35, 36 for constraining movement of an electronic component; placing a first electronic component 10a in said at least one formation; and providing a force for actively aligning said first electronic component with a lateral boundary of said at least one formation. The force may, for example, be provided by tilting the positioning member, by providing suction or by using an actuator. An apparatus for aligning electronic components and a 3D system of stacked electronic components is also disclosed.
    Type: Grant
    Filed: March 29, 2010
    Date of Patent: October 1, 2013
    Assignee: Hong Kong Applied Science & Technology Research Institute Co., Ltd.
    Inventors: Chi Kuen Vincent Leung, Bin Xie, Xunqing Shi
  • Patent number: 8194411
    Abstract: One aspect of the present invention provides an electronic package, comprising at least a first module and a second module arranged on top of the first module, the modules together in the form of a module stack, wherein the first and second modules are adhesively connected together, each module includes a substrate layer having at least one metal layer, at least one die and a plastic(s) package molding compound layer molded over said die or dice, in each module the die or dice are bonded on said substrate layer via the metal layer, a plurality of channels formed generally vertically acting as vias to connect the metal layers and arranged adjacent to the die or dice in at least one of the modules, some or all the channels provided with an inner surface coated with a conductive material layer or filled with a conductive material for electrical connection whereby the dice are electrically connected together, and means serving as an intermediary for providing electrical, mechanical and thermal connectivity, commu
    Type: Grant
    Filed: March 31, 2009
    Date of Patent: June 5, 2012
    Assignee: Hong Kong Applied Science and Technology Research Institute Co. Ltd
    Inventors: Chi Kuen Vincent Leung, Peng Sun, Xunqing Shi, Chang Hwa Tom Chung
  • Patent number: 8030208
    Abstract: There is described a bonding method for through-silicon-via bonding of a wafer stack in which the wafers are formed with through-silicon-vias and lateral microchannels that are filled with solder. To fill the vias and channels the wafer stack is placed in a soldering chamber and molten solder is drawn through the vias and channels by vacuum. The wafers are held together by layers of adhesive during the assembly of the wafer stack. Means are provided for local reheating of the solder after it has cooled to soften the solder to enable it to be removed from the soldering chamber.
    Type: Grant
    Filed: June 2, 2008
    Date of Patent: October 4, 2011
    Assignee: Hong Kong Applied Science and Technology Research Institute Company Limited
    Inventors: Chi Kuen Vincent Leung, Peng Sun, Xunqing Shi, Chang Hwa Chung
  • Publication number: 20110235299
    Abstract: A method of aligning electronic components comprising providing a positioning member 110 having at least one formation 120 for receiving an electronic component; said at least one formation having lateral boundaries 35, 36 for constraining movement of an electronic component; placing a first electronic component 10a in said at least one formation; and providing a force for actively aligning said first electronic component with a lateral boundary of said at least one formation. The force may, for example, be provided by tilting the positioning member, by providing suction or by using an actuator. An apparatus for aligning electronic components and a 3D system of stacked electronic components is also disclosed.
    Type: Application
    Filed: March 29, 2010
    Publication date: September 29, 2011
    Inventors: Chi Kuen Vincent Leung, Bin Xie, Xunqing Shi
  • Publication number: 20110147908
    Abstract: The module comprises a first substrate and at least one chip mounted on the first substrate. A second substrate is mounted to the first substrate and has an opening therein. The opening is lined with the at least one chip. The second substrate is overmolded and the first substrate is electrically connected to the second substrate by at least one first electrical connector. At least one second electrical connector extends from the second substrate through the overmold and has its exposed ends for electrical connection to an external module. The external module may be mounted to the first module in order to form a package on package assembly.
    Type: Application
    Filed: December 17, 2009
    Publication date: June 23, 2011
    Inventors: Peng Sun, Chi Kuen Vincent Leung, Xun Qing Shi
  • Patent number: 7832278
    Abstract: Subject matter disclosed herein may relate to packaging for multi-chip semiconductor devices as may be used, for example, in tire pressure monitoring systems.
    Type: Grant
    Filed: May 29, 2008
    Date of Patent: November 16, 2010
    Assignee: Hong Kong Applied Science and Technology Research Institute Co., Ltd.
    Inventors: Man Lung Ivan Sham, Ziyang Gao, Chi Kuen Vincent Leung, Lap Wai Lydia Leung, Lourdito M. Olleres, Chang Hwa Tom Chung
  • Publication number: 20100246141
    Abstract: One aspect of the present invention provides an electronic package, comprising at least a first module and a second module arranged on top of the first module, the modules together in the form of a module stack, wherein the first and second modules are adhesively connected together, each module includes a substrate layer having at least one metal layer, at least one die and a plastic(s) package molding compound layer molded over said die or dice, in each module the die or dice are bonded on said substrate layer via the metal layer, a plurality of channels formed generally vertically acting as vias to connect the metal layers and arranged adjacent to the die or dice in at least one of the modules, some or all the channels provided with an inner surface coated with a conductive material layer or filled with a conductive material for electrical connection whereby the dice are electrically connected together, and means serving as an intermediary for providing electrical, mechanical and thermal connectivity, commu
    Type: Application
    Filed: March 31, 2009
    Publication date: September 30, 2010
    Applicant: Hong Kong Applied Science and Technology Research Institute Co. Ltd. (ASTRI)
    Inventors: Chi Kuen Vincent Leung, Peng Sun, Xunqing Shi, Chang Hwa Chung
  • Publication number: 20090293604
    Abstract: Subject matter disclosed herein may relate to packaging for multi-chip semiconductor devices as may be used, for example, in tire pressure monitoring systems.
    Type: Application
    Filed: May 29, 2008
    Publication date: December 3, 2009
    Applicant: Hong Kong Applied Science and Technology Research Institute Company Limited (ASTRI)
    Inventors: Man Lung Sham, Ziyang Gao, Chi Kuen Vincent Leung, Lap Wai Leung, Lourdito M. Olleres, Chang Hwa Chung