Patents by Inventor Chi-Kuo Hsieh

Chi-Kuo Hsieh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20020068376
    Abstract: An improved method of fabricating a contact hole is provided. A semiconductor substrate is provided wherein a transistor is formed on the substrate. A dielectric layer is formed over the substrate. A patterned mask layer with an opening is formed on the dielectric layer. An UV curing treatment is performed on the mask layer. The dielectric layer is anisotropically etched using the mask layer as a mask to form a contact hole in the dielectric layer.
    Type: Application
    Filed: February 1, 1999
    Publication date: June 6, 2002
    Inventor: CHI-KUO HSIEH
  • Patent number: 6274503
    Abstract: A method for etching a doped polysilicon layer. A first doped polysilicon layer of a first conductive type and a second doped polysilicon layer of a second conductive type are formed. An etching process is performed to pattern the first doped polysilicon layer and the second doped polysilicon layer. The etching process includes a first main etching step and a second main etching step. The etching pressure of the first main etching step is lower than the etching pressure of the second main etching step.
    Type: Grant
    Filed: February 1, 1999
    Date of Patent: August 14, 2001
    Assignee: United Microelectronics Corp.
    Inventor: Chi-Kuo Hsieh
  • Patent number: 6143665
    Abstract: An improved method for oxide etching that uses of a mixture of etching gases including CF.sub.4 /C.sub.4 F.sub.8 /CO/Ar/N.sub.2 such that etching selectivity between oxide and other materials can be increased. Furthermore, the addition of a cleaning step between etching operations in this invention is able to remove most of the deposited polymers formed during the etching operation, hence etching stop phenomenon can be prevented. Also, the presence of N.sub.2 in the etching gas mixture is able to prevent the formation of polymers on the sidewalls of an etched contact opening. Hence, when metal is subsequently deposited into the opening to form a self-aligned silicide layer, there are few polymers to react with the metal atoms to form a layer of high resistance material on the sidewalls of the opening. Thus, reliability of the device can be maintained.
    Type: Grant
    Filed: December 29, 1997
    Date of Patent: November 7, 2000
    Assignee: United Semiconductor Corp
    Inventor: Chi-Kuo Hsieh