Abstract: A media player unit having a circuitry is disclosed herein. The media player unit comprises at least two dedicated memory sets, wherein one of the at least two dedicated memory set is fed with a first display content and another one of the at least two dedicated memory set is fed with a second display content. At least one switch is coupled to each of the dedicated memory sets for facilitating selective playing of the first display content or the second display content stored in any one of the at least two memory sets by the media player unit. In one embodiment, the switch is a single or double-pole-double-throw (SPDT or DPDT) toggle switch with a pull cord. In another embodiment, the switch is configured to be activated via a remote controller.

Abstract: A process for forming a groove in a semiconductor substrate, to be used to fabricate grooved gate, MOSFET devices, has been developed. The process features the use of an insulator mask, used as an etch mask for definition of the groove feature in the semiconductor substrate. A selective, anisotropic RIE procedure, using an etchant with a specific etch rate ratio of silicon, (semiconductor substrate), to silicon oxide, (insulator mask), is used to establish the desired groove depth, in the semiconductor substrate. The combination of a specific thickness of insulator shape, and a specific etch rate ratio for the selective, anisotropic RIE procedure, allows the desired depth of the groove to be established when the insulator shape is completely removed from the top surface of the semiconductor substrate.

Abstract: The present invention provides a buried layer fabrication sequence suitable for bipolar and BiCMOS applications. The buried layer fabrication sequence for forming a buried layer having a first conductivity type includes the steps of: forming a first dielectric layer on a semiconductor substrate, the semiconductor substrate having a second conductivity type; forming a first mask layer having openings on top of the first dielectric layer, wherein the openings in the first mask layer are positioned over the regions where the first buried layer is formed; exposing the semiconductor substrate in the regions where openings in the first mask layer are formed; forming a second dielectric layer; removing the second dielectric layer; and forming a semiconductor layer.

Abstract: A method of fabricating a BiCMOS device in which PMOS and NMOS transistors are formed prior to a base/emitter structure of a bipolar transistor. In forming the base/emitter structure, a blanket implant of a first impurity is introduced into a base region of a semiconductor substrate. An insulating layer is deposited and then patterned to expose a portion of the base region at an emitter window. A polysilicon layer is deposited on the insulating layer and into the emitter window. The polysilicon layer is patterned to provide the desired configuration at the emitter window, whereafter the remaining polysilicon acts as a mask for etching of the insulating layer. Thus, etching of the insulating layer is performed in a self-aligning manner. Self-alignment is also utilized in providing a base-link region and in providing a silicide layer.