Abstract: Embodiments described herein provide interconnect barrier layers and methods for forming such barriers. A dielectric body having a trench formed in a surface thereof is provided. A first layer is formed above the dielectric body within the trench. The first layer includes amorphous carbon. A second layer is formed above the first layer. The second layer includes a metal. The dielectric body, the first layer, and the second layer are heated to convert at least some of the amorphous carbon to graphene.

Abstract: A resistive-switching memory element is described. The memory element includes a first electrode, a porous layer over the first electrode including a point defect embedded in a plurality of pores of the porous layer, and a second electrode over the porous layer, wherein the nonvolatile memory element is configured to switch between a high resistive state and a low resistive state.

Abstract: Embodiments of the present invention provide methods and apparatuses using sputtering from a mosaic sputtering target for depositing layers onto a substrate, and provide the capability of depositing layers onto site isolated regions of the substrate in a combinatorial manner. A sputtering source is provided including a sputtering target comprising a first region having a first composition, and a second region having a second composition. A selection mechanism is capable of selecting a composition of emitted material from the sputtering source that can range from 0% to 100% of the first composition and from 0% to 100% of the second composition. The selection mechanism can comprise a movable magnetron or a moveable aperture.

Abstract: A combinatorial processing chamber and method are provided. In the method a fluid volume flows over a surface of a substrate with differing portions of the fluid volume having different constituent components to concurrently expose segregated regions of the substrate to a mixture of the constituent components that differ from constituent components to which adjacent regions are exposed. Differently processed segregated regions are generated through the multiple flowings.

Abstract: Techniques to improve characteristics of processed semiconductor substrates are described, including cleaning a substrate using a preclean process, the substrate comprising a dielectric region and a conductive region, introducing a hydroquinone to the substrate after cleaning the substrate using the preclean operation, and forming a capping layer over the conductive region of the substrate after introducing the hydroquinone.

Abstract: Resistive switching memory elements are provided that may contain electroless metal electrodes and metal oxides formed from electroless metal. The resistive switching memory elements may exhibit bistability and may be used in high-density multi-layer memory integrated circuits. Electroless conductive materials such as nickel-based materials may be selectively deposited on a conductor on a silicon wafer or other suitable substrate. The electroless conductive materials can be oxidized to form a metal oxide for a resistive switching memory element. Multiple layers of conductive materials can be deposited each of which has a different oxidation rate. The differential oxidization rates of the conductive layers can be exploited to ensure that metal oxide layers of desired thicknesses are formed during fabrication.