Patents by Inventor Chi Liang
Chi Liang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 11988839Abstract: The disclosure relates to an optical system for an augmented reality apparatus, comprising: an image projection source; and a polarizing beam splitter. The polarizing beam splitter has a beam splitting side adjacent to the image projection source and a transmission side facing away from the image projection source. The polarizing beam splitter is arranged such that light emitted from the image projection source is able to be non-perpendicularly incident on the beam splitting side and be at least partially reflected. The polarizing beam splitter is configured such that when light is incident on the beam splitting side, a polarized light component passes through the polarizing beam splitter and is transmitted through the transmission side thereof, and a polarized light component is reflected from the beam splitting side. The optical system also comprises a polarizer disposed between the image projection source and the beam splitting side of the polarizing beam splitter.Type: GrantFiled: May 30, 2023Date of Patent: May 21, 2024Assignee: MATRIXED REALITY TECHNOLOGY CO., LTD.Inventors: Bing Xiao, Xiaobin Liang, Chi Xu
-
Publication number: 20240161919Abstract: A maintenance system for a medical device includes a user device configured to communicate with the medical device and execute maintenance tasks on the medical device and communicate with a user via a user interface of the user device or the medical device. The maintenance tasks may be executed by either device or both devices, and communication with a user may occur via a user interface of either device or both devices. The system may also include a server configured to communicate with one or both of the user device and the medical device. The maintenance tasks may include an electrical safety check, a physical check, a performance check, and a functional check. Examples of functional checks include validation of a transient current detector and a thermal cutout.Type: ApplicationFiled: December 6, 2023Publication date: May 16, 2024Inventors: Ian Lee Wai KWAN, Warushahennedige Hansinie SOYSA, Wenjie Robin LIANG, Dexter Chi Lun CHEUNG
-
Patent number: 11977302Abstract: A cholesteric liquid crystal display device and a driving method for improving non-uniform image quality of the cholesteric liquid crystal display device. The cholesteric liquid crystal display device includes a cholesteric liquid crystal display panel and a liquid crystal drive unit. The cholesteric liquid crystal display panel is composed of multiple row circuit structures and multiple column circuit structures. The liquid crystal driving unit sequentially outputs column driving voltages to a plurality of column circuit structures in a scanning manner. After scanning the multiple column circuit structures, the liquid crystal driving unit applies an unselected voltage to the multiple column circuit structures together with more than 18 times the scanning unit time course, so as to make the brightness of the overall picture more uniform.Type: GrantFiled: December 8, 2022Date of Patent: May 7, 2024Assignee: IRIS OPTRONICS CO., LTD.Inventors: Ming-Liang Tsai, Wu-Chang Yang, Chi-Chang Liao
-
Publication number: 20240133918Abstract: In a method for obtaining the equivalent oxide thickness of a dielectric layer, a first semiconductor capacitor including a first silicon dioxide layer and a second semiconductor capacitor including a second silicon dioxide layer are provided and a modulation voltage is applied to the semiconductor capacitors to measure a first scanning capacitance microscopic signal and a second scanning capacitance microscopic signal. According to the equivalent oxide thicknesses of the silicon dioxide layers and the scanning capacitance microscopic signals, an impedance ratio is calculated. The modulation voltage is applied to a third semiconductor capacitor including a dielectric layer to measure a third scanning capacitance microscopic signal. Finally, the equivalent oxide thickness of the dielectric layer is obtained according to the equivalent oxide thickness of the first silicon dioxide layer, the first scanning capacitance microscopic signal, third scanning capacitance microscopic signal, and the impedance ratio.Type: ApplicationFiled: April 12, 2023Publication date: April 25, 2024Inventors: MAO-NAN CHANG, CHI-LUN LIU, HSUEH-LIANG CHOU, YI-SHAN WU, CHIAO-JUNG LIN, YU-HSUN HSUEH
-
Patent number: 11966133Abstract: An electronic device is disclosed. The electronic device includes a substrate, a plurality of color filters disposed on the substrate, an optical film disposed on the plurality of color filter, and a defect disposed between the substrate and the optical film. The optical film has a first base, a protective layer on the first base, and a second base between the first base and the protective layer and having a first processed area. In a top view of the electronic device, the first processed area corresponds to the defect and at least partially overlaps at least two color filters.Type: GrantFiled: May 18, 2023Date of Patent: April 23, 2024Assignee: INNOLUX CORPORATIONInventors: Tai-Chi Pan, Chin-Lung Ting, I-Chang Liang, Chih-Chiang Chang Chien, Po-Wen Lin, Kuang-Ming Fan, Sheng-Nan Chen
-
Publication number: 20240127783Abstract: Provided are a noise cancellation method and apparatus, an electronic device, a noise cancellation earphone, and a storage medium. The method includes acquiring original sound source information; performing noise reduction (NR) processing on the original sound source information using active noise cancellation (ANC) to obtain first sound information and performing the NR processing on the original sound source information using environmental noise cancellation (ENC) to obtain second sound information; and mixing and adding the first sound information and the second sound information to obtain target sound information and playing the target sound information. In this method, the NR processing can be performed on the sound using the ANC and the ENC, thereby distinguishing environmental noise from human voice, improving the noise cancellation performance, and enabling a user to hear clearer sound.Type: ApplicationFiled: April 3, 2023Publication date: April 18, 2024Applicant: Lanto Electronic LimitedInventors: Che-Yung Huang, Chi-Liang Chen, Yong-Sheng Jheng, Che-Yi HSIAO
-
Publication number: 20240120018Abstract: A memory device, a failure bits detector, and a failure bits detection method thereof are provided. The failure bits detector includes a current generator, a current mirror, and a comparator. The current generator generates a first current according to a reference code. The current mirror mirrors the first current to generate a second current at a second end of the current mirror. The comparator compares a first voltage at a first input end with a second voltage at a second input end to generate a detection result.Type: ApplicationFiled: October 5, 2022Publication date: April 11, 2024Applicant: MACRONIX International Co., Ltd.Inventors: Chung-Han Wu, Che-Wei Liang, Chih-He Chiang, Shang-Chi Yang
-
Publication number: 20240120437Abstract: A manufacturing method for a LED is disclosed. The method includes: providing a substrate with an upper surface; preparing a plurality of LEDs on the upper surface; wherein the upper surface is divided into a plurality of zones, the plurality of LEDs composes a plurality of LED groups, and each of the LED group is disposed in one of the plurality of zones; preparing a testing circuit to electrically connecting the plurality of LEDs in one of the plurality of LED groups; testing the plurality of LEDs in the one of the plurality of LED groups by the testing circuit to obtain photoelectrical characteristics of the plurality of LEDs in the one of the plurality of LED groups; and presenting the photoelectric characteristics in an image.Type: ApplicationFiled: December 11, 2023Publication date: April 11, 2024Inventors: Chia-Chen TSAI, Jia-Liang TU, Chi-Ling LEE
-
Publication number: 20240121889Abstract: An electronic device and a manufacturing method thereof are provided. The electronic device includes a circuit substrate, a plurality of electronic components, a plurality of carriers, and a bonding layer. The circuit substrate includes a circuit layer. The plurality of electronic components are disposed on the circuit substrate. The circuit layer is electrically connected to at least one of the plurality of electronic components. The plurality of carriers are disposed on the circuit substrate. The bonding layer bonds the plurality of carriers to the circuit substrate. At least one gap is between the plurality of carriers. A width of the gap is Wg. An average width of the plurality of carriers is Wa. A width of the circuit substrate is Wc. The electronic device satisfies: Wa*2*10?4<Wg<(Wc?Wa*2).Type: ApplicationFiled: April 21, 2023Publication date: April 11, 2024Applicant: Innolux CorporationInventor: Chi-Liang Chang
-
Publication number: 20240112943Abstract: A die suction assistance device is provided to a wafer. The wafer is diced into multiple dies, and a tape is taped on a bottom side of the wafer. The die suction assistance device includes a platform and multiple support structures mounted in the platform. Multiple air ducts are formed among adjacent support structures. When the wafer is air-tightly mounted on the platform, the wafer is supported by the support structures. When an external vacuum device vacuums air out of the platform, a vacuum environment with negative pressure is created in the air ducts. This allows the tape to partially separate from a backside of each of the dies towards the air ducts, and allows the dies to be picked up respectively by a suction nozzle with less chance of being damaged, securing integrities of dies.Type: ApplicationFiled: November 8, 2022Publication date: April 4, 2024Applicant: PANJIT INTERNATIONAL INC.Inventors: Chung-Hsiung HO, Chi-Hsueh LI, Wen-Liang HUANG
-
Patent number: 11948528Abstract: The present invention relates to a driving method of a cholesteric liquid crystal display. It includes the steps in the following: driving each scan line by a dynamic driving scheme (DDS) including an Evolution phase; refreshing a frame of the cholesteric liquid crystal display by a full refresh mode, each scan line driven N times during the Evolution phase in the full refresh mode; and refreshing a part of the frame by a partial-refresh mode, each scan line driven M times in the Evolution phase in the partial-refresh mode, wherein M is greater than N.Type: GrantFiled: May 10, 2023Date of Patent: April 2, 2024Assignee: IRIS OPTRONICS CO., LTD.Inventors: Ming-Liang Tsai, Wu-Chang Yang, Chi-Chang Liao
-
Publication number: 20240103650Abstract: The present disclosure relates to a method of operating an OSD function for a public-place-device. The method includes: detecting a touch input through the touch screen while the OSD function is in the locked state; causing the OSD function to operate in the unlocked state in response to detecting a predetermined touch secret code, so as to output an OSD image on the display and conduct an OSD configuration of the display according to an OSD operation from an external entity; and causing the OSD function to operate in the locked state in response to receiving an OSD locking request while the OSD function is in the unlocked state, so as not to output the OSD image on the display and not to respond to an OSD operation from an external entity. The present disclosure also relates to an OSD system and a self-service device for the public-place-device.Type: ApplicationFiled: September 8, 2023Publication date: March 28, 2024Applicant: Elo Touch Solutions, Inc.Inventors: Shih-Tsung Chang, Chi-Liang Tai
-
Publication number: 20240095433Abstract: An integrated circuit includes a first conductor segment intersecting a first active-region structure at a source/drain region and a second conductor segment intersecting a second active-region structure at a source/drain region. The first conductor segment and the second conductor segment are separated at proximal edges by a separation distance. A distance from a first horizontal cell boundary to a proximal edge of the first conductor segment is larger than a distance from a second horizontal cell boundary to a proximal edge of the second conductor segment by a predetermined distance that is a fraction of the separation distance.Type: ApplicationFiled: November 29, 2023Publication date: March 21, 2024Inventors: Chih-Yu LAI, Chih-Liang CHEN, Chi-Yu LU, Shang-Hsuan CHIU
-
Publication number: 20240097090Abstract: A display device including at least two light source modules and a display control substrate is provided. Each of the at least two light source substrates has a first surface and a second surface opposite to each other and includes a plurality of light emitting elements and a plurality of connection pads. The light emitting elements are located on the second surface, and the connection pads are located on the first surface and are electrically connected to the light emitting elements. The display control substrate includes a back plate and a plurality of control elements. The control elements are located on the back plate, part of the control elements are electrically connected to the connection pads to drive and control the light emitting elements, and the second surface of each of the at least two light source substrates forms a part of a display surface of the display device.Type: ApplicationFiled: September 13, 2023Publication date: March 21, 2024Applicant: Coretronic CorporationInventors: Ming-Chuan Chih, Wen-Chun Wang, Chun-Chi Hsu, Bo-Chih Pan, Yu-Wei Liang
-
Publication number: 20240096800Abstract: A semiconductor device includes first and second active regions extending in parallel in a substrate, a plurality of conductive patterns, each conductive pattern of the plurality of conductive patterns extending on the substrate across each of the first and second active regions, and a plurality of metal lines, each metal line of the plurality of metal lines overlying and extending across each of the first and second active regions. Each conductive pattern of the plurality of conductive patterns is electrically connected in parallel with each metal line of the plurality of metal lines.Type: ApplicationFiled: November 27, 2023Publication date: March 21, 2024Inventors: Fei Fan DUAN, Fong-yuan CHANG, Chi-Yu LU, Po-Hsiang HUANG, Chih-Liang CHEN
-
Publication number: 20240094912Abstract: A method for accessing a flash memory module includes: determining a type of data to be written into the flash memory module; selecting a specific encoding/decoding setting from a plurality of sets of encoding/decoding settings at least according to the type of data, wherein the plurality of sets of encoding/decoding settings correspond to different data lengths, respectively; utilizing the specific encoding/decoding setting to encode the data to generate encoded data; and writing the encoded data into a block of the flash memory module.Type: ApplicationFiled: November 24, 2022Publication date: March 21, 2024Applicant: Silicon Motion, Inc.Inventors: Chia-Chi Liang, Hsiao-Chang Yen, Tsu-Han Lu
-
Publication number: 20240094915Abstract: A method for accessing a flash memory module includes: selecting a block in the flash memory module; selecting a specific encoding/decoding setting from a plurality of sets of encoding/decoding settings at least according to an erase count of the block, wherein the plurality of sets of encoding/decoding settings include different error correction code (ECC) lengths, respectively; utilizing the specific encoding/decoding setting to encode a data to generate an encoded data; and writing the encoded data into the block.Type: ApplicationFiled: October 31, 2022Publication date: March 21, 2024Applicant: Silicon Motion, Inc.Inventors: Chia-Chi Liang, Hsiao-Chang Yen, Tsu-Han Lu
-
Publication number: 20240096756Abstract: A method of making a semiconductor device includes manufacturing a first transistor over a first side of a substrate. The method further includes depositing a spacer material against a sidewall of the first transistor. The method further includes recessing the spacer material to expose a first portion of the sidewall of the first transistor. The method further includes manufacturing a first electrical connection to the transistor, a first portion of the electrical connection contacts a surface of the first transistor farthest from the substrate, and a second portion of the electrical connect contacts the first portion of the sidewall of the first transistor. The method further includes manufacturing a self-aligned interconnect structure (SIS) extending along the spacer material, wherein the spacer material separates a portion of the SIS from the first transistor, and the first electrical connection directly contacts the SIS.Type: ApplicationFiled: November 22, 2023Publication date: March 21, 2024Inventors: Chih-Yu LAI, Chih-Liang CHEN, Chi-Yu LU, Shang-Syuan CIOU, Hui-Zhong ZHUANG, Ching-Wei TSAI, Shang-Wen CHANG
-
Patent number: 11935804Abstract: In an embodiment, a device includes: an integrated circuit die; an encapsulant at least partially surrounding the integrated circuit die, the encapsulant including fillers having an average diameter; a through via extending through the encapsulant, the through via having a lower portion of a constant width and an upper portion of a continuously decreasing width, a thickness of the upper portion being greater than the average diameter of the fillers; and a redistribution structure including: a dielectric layer on the through via, the encapsulant, and the integrated circuit die; and a metallization pattern having a via portion extending through the dielectric layer and a line portion extending along the dielectric layer, the metallization pattern being electrically coupled to the through via and the integrated circuit die.Type: GrantFiled: April 10, 2023Date of Patent: March 19, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Tzu-Sung Huang, Ming Hung Tseng, Yen-Liang Lin, Hao-Yi Tsai, Chi-Ming Tsai, Chung-Shi Liu, Chih-Wei Lin, Ming-Che Ho
-
Publication number: 20240086611Abstract: Systems, methods and devices are provided, which can include an engineering change order (ECO) base. A base layout cell includes metal layer regions, conductive gate patterns arranged above metal layer regions; oxide definition (OD) patterns, metal-zero layer over oxide-definition (metal-zero) patterns, at least one cut metal layer (CMD) pattern; and at least one via region. The base layout cell can be implemented in at least two non-identical functional cells. A first functional cell of the at least two non-identical functional cells includes first interconnection conductive patterns arranged connecting metal-zero structures corresponding to at least two metal-zero patterns in a first layout, and a second functional cell of the at least two non-identical functional cells includes second interconnection conductive patterns arranged connecting metal-zero structures corresponding to at least two metal-zero patterns in a second layout.Type: ApplicationFiled: November 20, 2023Publication date: March 14, 2024Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Shang-Hsuan Chiu, Chih-Liang Chen, Hui-Zhong Zhuang, Chi-Yu Lu, Kuang-Ching Chang