Abstract: A heat-conductive package structure includes a carrier board having a first surface and an opposing second surface and formed with a through opening passing the carrier board; a first heat-conductive structure including a heat-conductive hole in the through opening, a first heat-conductive sheet on the carrier board, and a second heat-conductive sheet on the carrier board, wherein the first and second heat-conductive sheets are conductively connected by the heat-conductive hole; a first dielectric layer formed on the first surface of the carrier board and formed with a first opening for exposing the first heat-conductive sheet; a second dielectric layer formed on the second surface of the carrier board and formed with at least a second opening for exposing a portion of the second heat-conductive sheet; and a second heat-conductive structure formed in the second opening and mounted on the second heat-conductive sheet.

Abstract: A heat-conductive package structure includes a carrier board having a first surface and an opposing second surface and formed with a through opening passing the carrier board; a first heat-conductive structure including a heat-conductive hole in the through opening, a first heat-conductive sheet on the carrier board, and a second heat-conductive sheet on the carrier board, wherein the first and second heat-conductive sheets are conductively connected by the heat-conductive hole; a first dielectric layer formed on the first surface of the carrier board and formed with a first opening for exposing the first heat-conductive sheet; a second dielectric layer formed on the second surface of the carrier board and formed with at least a second opening for exposing a portion of the second heat-conductive sheet; and a second heat-conductive structure formed in the second opening and mounted on the second heat-conductive sheet.

Abstract: A semiconductor chip-embedded circuit board and a fabrication method thereof are provided, including: a core board having first and second surfaces with first and second circuit layers thereon respectively, the first surface having a chip-receiving area (CRA); a laminated layer formed on the first and second surfaces and formed with an opening for exposing the CRA; third and fourth circuit layers formed on the laminated layer, the third circuit layer having first and second conductive pads, the fourth circuit layer having third conductive pads; a first insulating protective layer formed on the third circuit layer and formed with a plurality of first openings for exposing the first conductive pads and the CRA and a plurality of second openings for exposing the second conductive pads; and a second insulating protective layer formed on the fourth circuit layer and formed with third openings for exposing the third conductive pads. Mounting a semiconductor chip on the CRA reduces package height.