Abstract: A package structure including a redistribution circuit structure, a wiring substrate, first conductive terminals, an insulating encapsulation, and a semiconductor device is provided. The redistribution circuit structure includes stacked dielectric layers, redistribution wirings and first conductive pads. The first conductive pads are disposed on a surface of an outermost dielectric layer among the stacked dielectric layers, the first conductive pads are electrically connected to outermost redistribution pads among the redistribution wirings by via openings of the outermost dielectric layer, and a first lateral dimension of the via openings is greater than a half of a second lateral dimension of the outermost redistribution pads. The wiring substrate includes second conductive pads. The first conductive terminals are disposed between the first conductive pads and the second conductive pads. The insulating encapsulation is disposed on the surface of the redistribution circuit structure.

Abstract: A semiconductor package with an internal heat sink has a substrate, a chip and an encapsulation. The substrate has an embedded heat sink, a first wiring surface and a second wiring surface. The embedded heat sink has a first surface and a second surface. The second wiring surface of the substrate and the second surface of the heat sink are coplanar. The chip has an active surface and a rear surface mounted on the first surface of heat sink through a thermal interface material layer and the active surface is electrically connected to the first wiring surface of the substrate. The encapsulation is formed on the first wiring surface of the substrate and the encapsulation encapsulates the chip. The heat generated from the chip is quickly transmitted to the heat sink and dissipated to air through the heat sink. Therefore, a heat dissipation performance of the semiconductor package is increased.

Abstract: A semiconductor package including a chip stack, at least one conductive wire, a first insulating encapsulant, a second insulating encapsulant, and a redistribution layer is provided, and a manufacturing method thereof is also provided. The chip stack includes semiconductor chips stacked on top of each other. Each semiconductor chip has an active surface that has at least one bonding region, and each bonding region is exposed by the chip stack. The conductive wire is correspondingly disposed on the bonding region. The first insulating encapsulant encapsulates the bonding region and the conductive wire. At least a portion of each conductive wire is exposed from the first insulating encapsulant. The second insulating encapsulant encapsulates the chip stack and the first insulating encapsulant. The first insulating encapsulant is exposed from the second insulating encapsulant. The redistribution layer is disposed on the first and second insulating encapsulant and electrically coupled to the conductive wire.

Abstract: A chip structure including a chip and a redistribution layer is provided. The chip includes a plurality of pads. The redistribution layer includes a dielectric layer and a plurality of conductive traces. The dielectric layer is disposed on the chip and has a plurality of contact windows located above the pads. The conductive traces are located on the dielectric layer and are electrically coupled to the pads through the contact windows. At least one of the conductive traces includes a body and at least one protrusion coupled to the body, and the at least one protrusion is coupled to an area of the body other than where the contact windows are coupled to on the body.

Abstract: A chip structure including a chip and a redistribution layer is provided. The chip includes a plurality of pads. The redistribution layer includes a dielectric layer and a plurality of conductive traces. The dielectric layer is disposed on the chip and has a plurality of contact windows located above the pads. The conductive traces are located on the dielectric layer and are electrically coupled to the pads through the contact windows. At least one of the conductive traces includes a body and at least one protrusion coupled to the body, and the at least one protrusion is coupled to an area of the body other than where the contact windows are coupled to on the body.

Abstract: An ESD protection structure is provided. A substrate includes a first voltage variable material and has a first surface, a second surface substantially paralleled to the first surface and a via connecting the first and second surfaces. A first metal layer is disposed in the substrate for coupling to a ground terminal. The first voltage variable material is in a conductive state when an ESD event occurs, such that the via is electrically connected with the first metal layer to form a discharge path, and the first voltage variable material is in an isolation state when the ESD event is absent, such that the via is electrically isolated from the first metal layer.

Abstract: An ESD protection substrate is disclosed. The ESD protection substrate includes a first conductor, a second conductor, a pointed structure, and an ESD protection material. The pointed structure is electrically connected to the first or the second conductor. The ESD protection material is disposed between the first and the second conductors.

Abstract: An ESD protection structure is provided. A substrate includes a first voltage variable material and has a first surface, a second surface substantially paralleled to the first surface and a via connecting the first and second surfaces. A first metal layer is disposed in the substrate for coupling to a ground terminal. The first voltage variable material is in a conductive state when an ESD event occurs, such that the via is electrically connected with the first metal layer to form a discharge path, and the first voltage variable material is in an isolation state when the ESD event is absent, such that the via is electrically isolated from the first metal layer.

Abstract: An ESD protection substrate is disclosed. The ESD protection substrate includes a first conductor, a second conductor, a pointed structure, and an ESD protection material. The pointed structure is electrically connected to the first or the second conductor. The ESD protection material is disposed between the first and the second conductors.