Patents by Inventor Chi-Liang Shih

Chi-Liang Shih has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11710958
    Abstract: A power system includes multiple power units (PUs), each including a circuit breaker (CB), a local controller (LC) and an intelligent electronic device (IED). For any one of the PUs, the IED, when determining that the CB has mechanically failed, outputs a disconnect message via a network to the IED(s) of the remaining PU(s). For each of the remaining PU(s), based on the disconnect message, the IED thereof, when determining that the corresponding CB is a relevant CB, outputs a trip control signal that indicates to trip for receipt by the corresponding LC, so that the LC causes the CB to switch to an open state.
    Type: Grant
    Filed: October 28, 2021
    Date of Patent: July 25, 2023
    Assignee: TAIWAN POWER COMPANY
    Inventor: Chi-Liang Shih
  • Publication number: 20230082767
    Abstract: An electronic package is provided and uses a plurality of bonding wires as a shielding structure. The bonding wires are stitch bonded onto a carrier carrying electronic components, such that the problem of the shielding structure peeling off or falling off from the carrier can be avoided due to the fact that the bonding wires are not affected by temperature, humidity and other environmental factors.
    Type: Application
    Filed: November 17, 2022
    Publication date: March 16, 2023
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Chih-Hsien Chiu, Wen-Jung Tsai, Yu-Wei Yeh, Tsung-Hsien Tsai, Chi-Liang Shih, Sheng-Ming Yang, Ping-Hung Liao
  • Patent number: 11532568
    Abstract: An electronic package is provided and uses a plurality of bonding wires as a shielding structure. The bonding wires are stitch bonded onto a carrier carrying electronic components, such that the problem of the shielding structure peeling off or falling off from the carrier can be avoided due to the fact that the bonding wires are not affected by temperature, humidity and other environmental factors.
    Type: Grant
    Filed: July 16, 2020
    Date of Patent: December 20, 2022
    Assignee: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Chih-Hsien Chiu, Wen-Jung Tsai, Yu-Wei Yeh, Tsung-Hsien Tsai, Chi-Liang Shih, Sheng-Ming Yang, Ping-Hung Liao
  • Publication number: 20220166209
    Abstract: A power system includes multiple power units (PUs), each including a circuit breaker (CB), a local controller (LC) and an intelligent electronic device (IED). For any one of the PUs, the IED, when determining that the CB has mechanically failed, outputs a disconnect message via a network to the IED(s) of the remaining PU(s). For each of the remaining PU(s), based on the disconnect message, the IED thereof, when determining that the corresponding CB is a relevant CB, outputs a trip control signal that indicates to trip for receipt by the corresponding LC, so that the LC causes the CB to switch to an open state.
    Type: Application
    Filed: October 28, 2021
    Publication date: May 26, 2022
    Inventor: Chi-Liang SHIH
  • Publication number: 20210375783
    Abstract: An electronic package is provided and uses a plurality of bonding wires as a shielding structure. The bonding wires are stitch bonded onto a carrier carrying electronic components, such that the problem of the shielding structure peeling off or falling off from the carrier can be avoided due to the fact that the bonding wires are not affected by temperature, humidity and other environmental factors.
    Type: Application
    Filed: July 16, 2020
    Publication date: December 2, 2021
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Chih-Hsien Chiu, Wen-Jung Tsai, Yu-Wei Yeh, Tsung-Hsien Tsai, Chi-Liang Shih, Sheng-Ming Yang, Ping-Hung Liao
  • Patent number: 10916838
    Abstract: An electronic module is provided, which includes: a substrate; an antenna body disposed over the substrate; and an encapsulant formed on the substrate and encapsulating the antenna body. A portion of the antenna body is exposed from the encapsulant. As such, the invention increases the arrangement area of the antenna body without increasing the size of the substrate, and also reduces the height of the encapsulant. Therefore, the electronic module of the present invention meets the miniaturization requirement.
    Type: Grant
    Filed: April 24, 2015
    Date of Patent: February 9, 2021
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Chih-Hsien Chiu, Chi-Liang Shih
  • Patent number: 10566320
    Abstract: An electronic package is provided, including: a substrate having opposite first and second surfaces; at least a first electronic element disposed on the first surface of the substrate; a first encapsulant encapsulating the first electronic element; at least a second electronic element and a frame disposed on the second surface of the substrate; and a second encapsulant encapsulating the second electronic element. By disposing the first and second electronic elements on the first and second surfaces of the substrate, respectively, the invention allows a required number of electronic elements to be mounted on the substrate without the need to increase the surface area of the substrate. Since the volume of the electronic package does not increase, the electronic package meets the miniaturization requirement. The present invention further provides a method for fabricating the electronic package.
    Type: Grant
    Filed: December 6, 2018
    Date of Patent: February 18, 2020
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Chi-Liang Shih, Chun-Chong Chien, Hsin-Lung Chung, Te-Fang Chu
  • Publication number: 20190115330
    Abstract: An electronic package is provided, including: a substrate having opposite first and second surfaces; at least a first electronic element disposed on the first surface of the substrate; a first encapsulant encapsulating the first electronic element; at least a second electronic element and a frame disposed on the second surface of the substrate; and a second encapsulant encapsulating the second electronic element. By disposing the first and second electronic elements on the first and second surfaces of the substrate, respectively, the invention allows a required number of electronic elements to be mounted on the substrate without the need to increase the surface area of the substrate. Since the volume of the electronic package does not increase, the electronic package meets the miniaturization requirement. The present invention further provides a method for fabricating the electronic package.
    Type: Application
    Filed: December 6, 2018
    Publication date: April 18, 2019
    Inventors: Chi-Liang Shih, Chun-Chong Chien, Hsin-Lung Chung, Te-Fang Chu
  • Patent number: 10181458
    Abstract: An electronic package is provided, including: a substrate having opposite first and second surfaces; at least a first electronic element disposed on the first surface of the substrate; a first encapsulant encapsulating the first electronic element; at least a second electronic element and a frame disposed on the second surface of the substrate; and a second encapsulant encapsulating the second electronic element. By disposing the first and second electronic elements on the first and second surfaces of the substrate, respectively, the invention allows a required number of electronic elements to be mounted on the substrate without the need to increase the surface area of the substrate. Since the volume of the electronic package does not increase, the electronic package meets the miniaturization requirement. The present invention further provides a method for fabricating the electronic package.
    Type: Grant
    Filed: December 28, 2015
    Date of Patent: January 15, 2019
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Chi-Liang Shih, Chun-Chong Chien, Hsin-Lung Chun, Te-Fang Chu
  • Patent number: 10074621
    Abstract: Provided is an electronic package, including: a carrier, an electronic component disposed on the carrier, and an antenna structure, wherein the antenna structure has a plurality of spacing members and at least one wire connected among the spacing members. No additional layout area is required to be formed on a surface of the carrier, such that the objective of miniaturization can be achieved.
    Type: Grant
    Filed: June 14, 2016
    Date of Patent: September 11, 2018
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Chih-Hsien Chiu, Chi-Pin Tsai, Chi-Liang Shih, Ming-Fan Tsai, Chia-Yang Chen
  • Publication number: 20180047711
    Abstract: An electronic stack structure is provided, including a first substrate, a second substrate stacked on the first substrate through a plurality of passive elements, and an electronic element disposed on at least one of the first substrate and the second substrate. As such, the distance between the first substrate and the second substrate is defined by the height and size of the passive elements. The present disclosure further provides a method for fabricating the electronic stack structure.
    Type: Application
    Filed: November 16, 2016
    Publication date: February 15, 2018
    Inventors: Chih-Hsien Chiu, Chi-Liang Shih, Jia-Huei Hung, Chia-Yang Chen, Yueh-Chiung Chang
  • Publication number: 20170278807
    Abstract: Provided is an electronic package, including: a carrier, an electronic component disposed on the carrier, and an antenna structure, wherein the antenna structure has a plurality of spacing members and at least one wire connected among the spacing members. No additional layout area is required to be formed on a surface of the carrier, such that the objective of miniaturization can be achieved.
    Type: Application
    Filed: June 14, 2016
    Publication date: September 28, 2017
    Inventors: Chih-Hsien Chiu, Chi-Pin Tsai, Chi-Liang Shih, Ming-Fan Tsai, Chia-Yang Chen
  • Publication number: 20170040304
    Abstract: An electronic package is provided, including: a substrate having opposite first and second surfaces; at least a first electronic element disposed on the first surface of the substrate; a first encapsulant encapsulating the first electronic element; at least a second electronic element and a frame disposed on the second surface of the substrate; and a second encapsulant encapsulating the second electronic element. By disposing the first and second electronic elements on the first and second surfaces of the substrate, respectively, the invention allows a required number of electronic elements to be mounted on the substrate without the need to increase the surface area of the substrate. Since the volume of the electronic package does not increase, the electronic package meets the miniaturization requirement. The present invention further provides a method for fabricating the electronic package.
    Type: Application
    Filed: December 28, 2015
    Publication date: February 9, 2017
    Inventors: Chi-Liang Shih, Chun-Chong Chien, Hsin-Lung Chun, Te-Fang Chu
  • Patent number: 9526171
    Abstract: A package structure is provided, which includes: a substrate having opposite first and second surfaces; at least an electronic element disposed on the first surface of the substrate; and an encapsulant formed on the first surface of the substrate for encapsulating the electronic element. The encapsulant has a non-rectangular shape so as to reduce an ineffective space in the encapsulant.
    Type: Grant
    Filed: December 9, 2014
    Date of Patent: December 20, 2016
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Chi-Liang Shih, Hsin-Lung Chung, Te-Fang Chu, Hao-Ju Fang, Kuang-Neng Chung
  • Publication number: 20160300660
    Abstract: An electronic device is provided, which includes: a magnetically conductive element having at least a through hole; a conductor structure formed on the magnetically conductive element and in the through hole; and a base body encapsulating the magnetically conductive element and the conductor structure, thereby allowing the electronic device to generate a higher magnetic flux and thus cause an increase in inductance.
    Type: Application
    Filed: May 21, 2015
    Publication date: October 13, 2016
    Inventors: Chih-Hsien Chiu, Chi-Pin Tsai, Ming-Fan Tsai, Jyun-Yuan Jhang, Chi-Liang Shih
  • Publication number: 20160172762
    Abstract: An electronic module is provided, which includes: a substrate; an antenna body disposed over the substrate; and an encapsulant formed on the substrate and encapsulating the antenna body. A portion of the antenna body is exposed from the encapsulant. As such, the invention increases the arrangement area of the antenna body without increasing the size of the substrate, and also reduces the height of the encapsulant. Therefore, the electronic module of the present invention meets the miniaturization requirement.
    Type: Application
    Filed: April 24, 2015
    Publication date: June 16, 2016
    Inventors: Chih-Hsien Chiu, Chi-Liang Shih
  • Patent number: 9343401
    Abstract: A method for fabricating a semiconductor package is provided, which includes the steps of: providing a packaging substrate having a first surface with a plurality of bonding pads and an opposite second surface; disposing a plurality of passive elements on the first surface of the packaging substrate; disposing a semiconductor chip on the passive elements through an adhesive film; electrically connecting the semiconductor chip and the bonding pads through a plurality of bonding wires; and forming an encapsulant on the first surface of the packaging substrate for encapsulating the semiconductor chip, the passive elements and the bonding wires. By disposing the passive elements between the packaging substrate and the semiconductor chip, the invention saves space on the packaging substrate and increases the wiring flexibility. Further, since the bonding wires are not easy to come into contact with the passive elements, the invention prevents a short circuit from occurring.
    Type: Grant
    Filed: April 18, 2014
    Date of Patent: May 17, 2016
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Chi-Liang Shih, Hsin-Lung Chung, Te-Fang Chu, Sheng-Ming Yang, Hung-Cheng Chen, Chia-Yang Chen
  • Publication number: 20150366085
    Abstract: A package structure is provided, which includes: a substrate having opposite first and second surfaces; at least an electronic element disposed on the first surface of the substrate; and an encapsulant formed on the first surface of the substrate for encapsulating the electronic element. The encapsulant has a non-rectangular shape so as to reduce an ineffective space in the encapsulant.
    Type: Application
    Filed: December 9, 2014
    Publication date: December 17, 2015
    Inventors: Chi-Liang Shih, Hsin-Lung Chung, Te-Fang Chu, Hao-Ju Fang, Kuang-Neng Chung
  • Publication number: 20150243574
    Abstract: A method for fabricating a semiconductor package is provided, which includes the steps of: providing a packaging substrate having a first surface with a plurality of bonding pads and an opposite second surface; disposing a plurality of passive elements on the first surface of the packaging substrate; disposing a semiconductor chip on the passive elements through an adhesive film; electrically connecting the semiconductor chip and the bonding pads through a plurality of bonding wires; and forming an encapsulant on the first surface of the packaging substrate for encapsulating the semiconductor chip, the passive elements and the bonding wires. By disposing the passive elements between the packaging substrate and the semiconductor chip, the invention saves space on the packaging substrate and increases the wiring flexibility. Further, since the bonding wires are not easy to come into contact with the passive elements, the invention prevents a short circuit from occurring.
    Type: Application
    Filed: April 18, 2014
    Publication date: August 27, 2015
    Applicant: Siliconware Precision Industries Co., Ltd.
    Inventors: Chi-Liang Shih, Hsin-Lung Chung, Te-Fang Chu, Sheng-Ming Yang, Hung-Cheng Chen, Chia-Yang Chen