Patents by Inventor Chi Lu

Chi Lu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12039310
    Abstract: Data intake and query system (DIQS) instances supporting applications including lower-tier, focused, work group oriented applications may be tailored to meet the specific needs of the users. Rather than offer pre-configured options, the DIQS-based application offers the user the ability to customize data collection before deploying the collectors for specified host entities within an IT environment. Once the user selects the metrics and/or log sources for data collection at a custom interface, the lower-tier DIQS generates custom script operable to establish collection of the source data having the selected metrics and events associated with selected log sources from the specified host entities. The user can display and analyze the collected data.
    Type: Grant
    Filed: August 23, 2021
    Date of Patent: July 16, 2024
    Assignee: Splunk Inc.
    Inventors: Fang I. Hsiao, Ai-chi Lu, Nicholas Matthew Tankersley
  • Publication number: 20240202931
    Abstract: A measuring method and system for body-shaped data are provided. The measuring method comprises: performing a feature extraction on an apparel image to obtain a plurality of apparel feature points by a feature positioning module; performing a contour extraction on the apparel image to obtain an apparel boundary by an image segmentation module; calculating at least one shift value of the apparel feature points relative to the apparel boundary based on the apparel feature points and the apparel boundary by a processing module; correcting at least one of the apparel feature points according to the at least one shift value by the processing module, and projecting the corrected at least one of the apparel feature points to a three-dimensional model and obtaining at least one body-shaped data according to the apparel feature points on the three-dimensional model by the processing module.
    Type: Application
    Filed: December 14, 2022
    Publication date: June 20, 2024
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Yu-Chi Lu, Po Hsuan Hsiao, Ming-Yen Chen, Chang Hong Lin, Hsin-Yeh Yang, Cheng-Hsuan Cheng
  • Publication number: 20240203738
    Abstract: A device includes gate spacers over a substrate, and a gate structure between the gate spacers. The gate structure includes an interfacial layer over the substrate, a metal oxide layer over the interfacial layer, a metal oxide layer over the interfacial layer, a first metal nitride layer over the metal oxide layer, a second metal nitride over the first metal nitride layer, and a tungsten-containing material interposing the first metal nitride layer and the second metal nitride layer.
    Type: Application
    Filed: February 27, 2024
    Publication date: June 20, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yen-Yu CHEN, Yu-Chi LU, Chih-Pin TSAO, Shih-Hsun CHANG
  • Patent number: 11948800
    Abstract: A device includes a pair of gate spacers on a substrate, and a gate structure on the substrate and between the gate spacers. The gate structure includes an interfacial layer, a metal oxide layer, a nitride-containing layer, a tungsten-containing layer, and a metal compound layer. The interfacial layer is over the substrate. The metal oxide layer is over the interfacial layer. The nitride-containing layer is over the metal oxide layer. The tungsten-containing layer is over the nitride-containing layer. The metal compound layer is over the tungsten-containing layer. The metal compound layer has a different material than a material of the tungsten-containing layer.
    Type: Grant
    Filed: December 14, 2022
    Date of Patent: April 2, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yen-Yu Chen, Yu-Chi Lu, Chih-Pin Tsao, Shih-Hsun Chang
  • Patent number: 11934417
    Abstract: Data intake and query system (DIQS) instances supporting applications including lower-tier, focused, work group oriented applications, are tailored to display the metrics for the needs of the user. An interface caused by operation of an entity monitoring system (EMS) operating in conjunction with the lower-tier DIQS displays the monitored entities as individual representations. The user selects a metric and a metric threshold. The EMS causes a display of an interface having a representation for each monitored entity. Each representation includes a metric value and indicates an entity status based on the metric value and the threshold. The user can dynamically change the threshold on the interface for easy visualization of aggregation of monitored entities to determine the performance of the infrastructure. The interface also provides the user with the ability to select an entity and click through to the entity analysis workspace for more detailed information.
    Type: Grant
    Filed: July 12, 2021
    Date of Patent: March 19, 2024
    Assignee: Splunk Inc.
    Inventors: Ai-Chi Lu, Arun Ramani, Nicholas Matthew Tankersley
  • Publication number: 20240072445
    Abstract: An antenna structure includes a ground element, a first radiation element, a second radiation element, a third radiation element, a fourth radiation element, a fifth radiation element, and a dielectric substrate. The first radiation element has a feeding point. The first radiation element is coupled through the second radiation element to the ground element. The third radiation element is coupled to the first radiation element and the second radiation element. The fourth radiation element is coupled to the first radiation element and the third radiation element. The fifth radiation element is coupled to the ground element. The fifth radiation element is adjacent to the fourth radiation element. The ground element, the first radiation element, the second radiation element, the third radiation element, the fourth radiation element, and the fifth radiation element are disposed on the dielectric substrate.
    Type: Application
    Filed: July 19, 2023
    Publication date: February 29, 2024
    Inventors: Chih-Feng TAI, Tzu-Chi LU
  • Publication number: 20240062563
    Abstract: A system and a method for determining characteristic cells based on image recognition. In the method, a scanning device capturing a full image of the microslide; a host selecting images that comprise stained blocks from the full image; the host sequentially performing image recognition to recognize stained cells of the images, and determining whether the stained cells comprise the characteristic cells with an AI model; and selecting interested images from the images that comprise the characteristic cells, transforming the coordinate system of the interested images into the original coordinate system of the full image, and employing the scanning device to capture the interested images along the Z axis of the original coordinate system of the full image, thereby obtaining and outputting sets of pictures. The present invention can quickly determine whether there are characteristic cells in the tissue under test, so as to provide a diagnostic reference for doctors.
    Type: Application
    Filed: December 27, 2022
    Publication date: February 22, 2024
    Applicants: V5 TECHNOLOGIES CO., LTD., Taipei Veterans General Hospital
    Inventors: TZU-KUEI SHEN, LINDA SIANA, GUANG-HAO SUEN, LIANG-WEI SHEU, CHIEN-TING YANG, Yuh-Min Chen, Heng-sheng Chao, Chung-Wei Chou, Tsu-Hui Shiao, Yi-Han Hsiao, Chi-Lu Chiang
  • Patent number: 11823908
    Abstract: A method includes removing a dummy gate to form a gate trench. A gate dielectric layer is deposited over a bottom and sidewalls of the gate trench. A first work function metal layer is deposited over the gate dielectric layer. A dummy layer is deposited over the first work function metal layer. An impurity is introduced into the dummy layer and the first work function metal layer after the dummy layer is deposited. The dummy layer is removed after the impurity is introduced into the dummy layer and the first work function metal layer. The gate trench is filled with a conductive material after the dummy layer is removed.
    Type: Grant
    Filed: December 13, 2021
    Date of Patent: November 21, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yen-Yu Chen, Yu-Chi Lu, Chih-Pin Tsao, Shih-Hsun Chang
  • Publication number: 20230293619
    Abstract: The present disclosure provides a method for increasing content of melatonin in a subject and regulating expression of TPH gene, DDC gene, AANAT gene, and ASMT gene, including administering to a subject in need thereof a composition comprising an effective amount of a longan flower extract, wherein the longan flower extract can effectively increase the content of melatonin in the subject, and can directly improve sleep disturbance and insomnia, as well as the sleep quality within a few days after taking the longan flower extract. The present disclosure can help activate the melatonin synthesis pathway.
    Type: Application
    Filed: January 6, 2023
    Publication date: September 21, 2023
    Inventors: Pin-Chao HUANG, Hsi-Chi LU
  • Patent number: 11749532
    Abstract: Methods and apparatus for processing a substrate are provided. For example, a method of processing a substrate comprises supplying oxygen (O2) into a processing volume of an etch chamber to react with a silicon-based hardmask layer atop a base layer of ruthenium to form a covering of an SiO-like material over the silicon-based hardmask layer and etching the base layer of ruthenium using at least one of O2 or chloride (Cl2) while supplying nitrogen (N2) to sputter some of the SiO-like material onto an exposed ruthenium sidewall created during etching.
    Type: Grant
    Filed: May 4, 2021
    Date of Patent: September 5, 2023
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Hao Jiang, Chi Lu, He Ren, Mehul Naik
  • Patent number: 11738562
    Abstract: A logic circuitry package for a replaceable print apparatus component comprises an interface to communicate with a print apparatus logic circuit, and at least one logic circuit. The logic circuit may be configured to identify, from a command stream received from the print apparatus, parameters including a class parameter, and/or identify, from the command stream, a read request, and output, via the interface, a count value in response to a read request, the count value based on identified received parameters.
    Type: Grant
    Filed: July 14, 2022
    Date of Patent: August 29, 2023
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: James Michael Gardner, Scott A. Linn, Stephen D. Panshin, Jefferson P. Ward, David Owen Roethig, David N. Olsen, Anthony D. Studer, Michael W. Cumbie, Sirena Chi Lu
  • Publication number: 20230175077
    Abstract: Provided is a diagnostic system for identifying target microorganisms and/or resistance genes in a sample, including a cell lysis unit, a target nucleic acid enriching unit, a sequencing unit, and a sequence analyzing unit, wherein the cell lysis unit is configured to lyse non-target cells in the sample, the target nucleic acid enriching unit equipped with an immobilized adsorption device is configured to deplete nucleic acids of the non-target cells and to enrich nucleic acids of the target microorganisms, and the sequencing unit and the sequence analyzing unit are configured to produce identification results of the microbial species and/or resistance genes from the sequences of the enriched nucleic acids. Also provided is a method for enriching target nucleic acids in a sample and a method for identifying target microorganisms and/or resistance genes by sequencing the enriched nucleic acids of the target microorganisms.
    Type: Application
    Filed: December 6, 2022
    Publication date: June 8, 2023
    Applicant: CENTERS FOR DISEASE CONTROL, MINISTRY OF HEALTH AND WELFARE
    Inventors: Chien-Shun CHIOU, Hui-Yung SONG, Bo-Han CHEN, Yu-Ping HONG, Min-Chi LU, Hui-Ling TANG
  • Publication number: 20230109915
    Abstract: A device includes a pair of gate spacers on a substrate, and a gate structure on the substrate and between the gate spacers. The gate structure includes an interfacial layer, a metal oxide layer, a nitride-containing layer, a tungsten-containing layer, and a metal compound layer. The interfacial layer is over the substrate. The metal oxide layer is over the interfacial layer. The nitride-containing layer is over the metal oxide layer. The tungsten-containing layer is over the nitride-containing layer. The metal compound layer is over the tungsten-containing layer. The metal compound layer has a different material than a material of the tungsten-containing layer.
    Type: Application
    Filed: December 14, 2022
    Publication date: April 13, 2023
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yen-Yu CHEN, Yu-Chi LU, Chih-Pin TSAO, Shih-Hsun CHANG
  • Publication number: 20230045689
    Abstract: A method of forming an interconnect structure for semiconductor devices is described. The method comprises etching a patterned interconnect stack for form first conductive lines and expose a top surface of a first etch stop layer; etching the first etch stop layer to form second conductive lines and expose a top surface of a barrier layer; and forming a self-aligned via.
    Type: Application
    Filed: October 18, 2022
    Publication date: February 9, 2023
    Applicant: Applied Materials, Inc.
    Inventors: Hao Jiang, Chi Lu, He Ren, Chi-I Lang, Ho-yung David Hwang, Mehul Naik
  • Patent number: 11568578
    Abstract: A method for generating goods modeling data comprises obtaining a platform image associated with a platform, a plurality of first goods images and a plurality of second goods images, wherein the first goods images and the second goods images correspond to different viewing angles respectively, and an image synthesis processing is performed according to the platform image and at least one of the first goods images and the second goods images to generate a synthesized image. The synthesized image includes a plurality of adjacent or partially overlapping image areas which correspond to at least many of the viewing angles. The image areas include a first and a second image areas. The first image area includes one of the first goods images or one of the second goods images. The second image area includes one of the first goods images or one of the second goods images.
    Type: Grant
    Filed: December 28, 2020
    Date of Patent: January 31, 2023
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chang Hong Lin, Po Hsuan Hsiao, Guan Rong Lin, Yu-Chi Lu
  • Patent number: 11551955
    Abstract: A substrate processing apparatus includes a process station for processing a substrate; a cassette station integrated with the process station; a substrate carriage equipped for transferring the substrate between said process station and the cassette station through a passage located at an interface between the process station and said cassette station; and a substrate scanner equipped at said interface between the process station and the cassette station for capturing surface image data during transportation of the substrate that passes through the passage.
    Type: Grant
    Filed: March 26, 2020
    Date of Patent: January 10, 2023
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Ming-Che Lai, Hua-Wei Peng, Chia-He Cheng, Ming-Tso Chen, Chao-Chi Lu, Hsin-Hsu Lin, Kuo-Tsai Lo, Kao-Hua Wu, Huan-Hsin Yeh
  • Patent number: 11508617
    Abstract: A method of forming an interconnect structure for semiconductor devices is described. The method comprises etching a patterned interconnect stack for form first conductive lines and expose a top surface of a first etch stop layer; etching the first etch stop layer to form second conductive lines and expose a top surface of a barrier layer; and forming a self-aligned via.
    Type: Grant
    Filed: October 24, 2019
    Date of Patent: November 22, 2022
    Assignee: Applied Materials, Inc.
    Inventors: Hao Jiang, Chi Lu, He Ren, Chi-I Lang, Ho-yung David Hwang, Mehul Naik
  • Publication number: 20220359224
    Abstract: Methods and apparatus for processing a substrate are provided. For example, a method of processing a substrate comprises supplying oxygen (O2) into a processing volume of an etch chamber to react with a silicon-based hardmask layer atop a base layer of ruthenium to form a covering of an SiO-like material over the silicon-based hardmask layer and etching the base layer of ruthenium using at least one of O2 or chloride (Cl2) while supplying nitrogen (N2) to sputter some of the SiO-like material onto an exposed ruthenium sidewall created during etching.
    Type: Application
    Filed: May 4, 2021
    Publication date: November 10, 2022
    Inventors: Hao JIANG, Chi LU, He REN, Mehul NAIK
  • Publication number: 20220348022
    Abstract: A logic circuitry package for a replaceable print apparatus component comprises an interface to communicate with a print apparatus logic circuit, and at least one logic circuit. The logic circuit may be configured to identify, from a command stream received from the print apparatus, parameters including a class parameter, and/or identify, from the command stream, a read request, and output, via the interface, a count value in response to a read request, the count value based on identified received parameters.
    Type: Application
    Filed: July 14, 2022
    Publication date: November 3, 2022
    Inventors: James Michael GARDNER, Scott A. LINN, Stephen D. PANSHIN, Jefferson P. WARD, David Owen ROETHIG, David N. OLSEN, Anthony D. STUDER, Michael W. CUMBIE, Sirena Chi LU
  • Patent number: 11479046
    Abstract: In an example, a method includes, by logic circuitry associated with a replaceable print apparatus component installed in a print apparatus, responding to a sensor data request received from the print apparatus by returning a first response; receiving a calibration parameter from the print apparatus; and returning a second response which is different from the first response.
    Type: Grant
    Filed: April 5, 2019
    Date of Patent: October 25, 2022
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: James Michael Gardner, Sirena Chi Lu, Scott A. Linn, Stephen D. Panshin, David Owen Roethig, David N. Olsen, Anthony D. Studer, Michael W. Cumbie, Jefferson P. Ward