Patents by Inventor Chi-Lung LEE
Chi-Lung LEE has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11955528Abstract: Semiconductor devices, FinFET devices and methods of forming the same are disclosed. One of the semiconductor devices includes a substrate and a gate strip disposed over the substrate. The gate strip includes a high-k layer disposed over the substrate, an N-type work function metal layer disposed over the high-k layer, and a barrier layer disposed over the N-type work function metal layer. The barrier layer includes at least one first film containing TiAlN, TaAlN or AlN.Type: GrantFiled: October 11, 2022Date of Patent: April 9, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Hsin-Yi Lee, Cheng-Lung Hung, Weng Chang, Chi-On Chui
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Publication number: 20240113183Abstract: Methods for tuning effective work functions of gate electrodes in semiconductor devices and semiconductor devices formed by the same are disclosed. In an embodiment, a semiconductor device includes a channel region over a semiconductor substrate; a gate dielectric layer over the channel region; and a gate electrode over the gate dielectric layer, the gate electrode including a first work function metal layer over the gate dielectric layer, the first work function metal layer including aluminum (Al); a first work function tuning layer over the first work function metal layer, the first work function tuning layer including aluminum tungsten (AlW); and a fill material over the first work function tuning layer.Type: ApplicationFiled: November 30, 2023Publication date: April 4, 2024Inventors: Hsin-Yi Lee, Cheng-Lung Hung, Weng Chang, Chi On Chui
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Patent number: 11944935Abstract: A gas detection purification device is disclosed and includes a main body, a purification unit, a gas guider, a gas detection module and a controlling-driving module. The main body includes an inlet, an outlet, an external socket and a gas-flow channel disposed between the inlet and the outlet. The purification unit is disposed in the gas-flow channel for filtering gas introduced through the gas-flow channel. The gas guider is disposed in the gas channel and located at a side of the purification unit. The gas is inhaled through the inlet, flows through the purification unit and is discharged out through the outlet. The gas detection module is plugged into or detached from the external socket. The controlling driving module is disposed within the main body and electrically connected to the gas guider to control the operation of the gas guider in an enabled state and a disabled state.Type: GrantFiled: December 2, 2020Date of Patent: April 2, 2024Assignee: MICROJET TECHNOLOGY CO., LTD.Inventors: Hao-Jan Mou, Yung-Lung Han, Chi-Feng Huang, Chang-Yen Tsai, Wei-Ming Lee, Tsung-I Lin
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Patent number: 11944412Abstract: A blood pressure detection device manufactured by a semiconductor process includes a substrate, a microelectromechanical element, a gas-pressure-sensing element, a driving-chip element, an encapsulation layer and a valve layer. The substrate includes inlet apertures. The microelectromechanical element and the gas-pressure-sensing element are stacked and integrally formed on the substrate. The encapsulation layer is encapsulated and positioned on the substrate. A flowing-channel space is formed above the microelectromechanical element and the gas-pressure-sensing element. The encapsulation layer includes an outlet aperture in communication with an airbag. The driving-chip element controls the microelectromechanical element, the gas-pressure-sensing element and valve units to transport gas.Type: GrantFiled: June 2, 2021Date of Patent: April 2, 2024Assignee: MICROJET TECHNOLOGY CO., LTD.Inventors: Hao-Jan Mou, Ying-Lun Chang, Ching-Sung Lin, Chi-Feng Huang, Yung-Lung Han, Chang-Yen Tsai, Wei-Ming Lee, Chun-Yi Kuo, Tsung-I Lin
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Patent number: 11946569Abstract: An actuating and sensing module is disclosed and includes a bottom plate, a gas pressure sensor, a thin gas transportation device and a cover plate. The bottom plate includes a pressure relief orifice, a discharging orifice and a communication orifice. The gas pressure sensor is disposed on the bottom plate and seals the communication orifice. The thin gas transportation device is disposed on the bottom plate and seals the pressure relief orifice and the discharging orifice. The cover plate is disposed on the bottom plate and covers the gas pressure sensor and the thin gas-transportation device. The cover plate includes an intake orifice. The thin gas transportation device is driven to inhale gas through the intake orifice, the gas is then discharged through the discharging orifice by the thin gas transportation device, and a pressure change of the gas is sensed by the gas pressure sensor.Type: GrantFiled: April 19, 2021Date of Patent: April 2, 2024Assignee: MICROJET TECHNOLOGY CO., LTD.Inventors: Hao-Jan Mou, Shih-Chang Chen, Jia-Yu Liao, Hung-Hsin Liao, Chung-Wei Kao, Chi-Feng Huang, Yung-Lung Han, Chang-Yen Tsai, Wei-Ming Lee
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Patent number: 11937903Abstract: A blood pressure device includes a first blood pressure measuring device, a second blood pressure measuring device, and a controller. The first blood pressure measuring device is to be worn on a first position of a wrist so as to obtain a first blood pressure information of the first position. The second blood pressure measuring device is to be worn on a second position of the wrist so as to obtain a second blood pressure information of the second position. The controller is electrically coupled to the first blood pressure measuring device and the second blood pressure measuring device so as to adjust tightness between the expanders and the user's skin, respectively. The controller receives, processes, and calculates a pulse transit time between the first blood pressure information and the second blood pressure information, and the controller obtains at least one blood pressure value based on the pulse transit time.Type: GrantFiled: December 29, 2020Date of Patent: March 26, 2024Assignee: MICROJET TECHNOLOGY CO., LTD.Inventors: Hao-Jan Mou, Yung-Lung Han, Chi-Feng Huang, Chang-Yen Tsai, Wei-Ming Lee, Chun-Yi Kuo, Chin-Wen Hsieh
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Patent number: 11935754Abstract: A device includes a first nanostructure; a second nanostructure over the first nanostructure; a high-k gate dielectric around the first nanostructure and the second nanostructure, the high-k gate dielectric having a first portion on a top surface of the first nano structure and a second portion on a bottom surface of the second nanostructure; and a gate electrode over the high-k gate dielectric. The gate electrode comprises: a first work function metal around the first nanostructure and the second nanostructure, the first work function metal filling a region between the first portion of the high-k gate dielectric and the second portion of the high-k gate dielectric; and a tungsten layer over the first work function metal, the tungsten layer being free of fluorine.Type: GrantFiled: June 30, 2022Date of Patent: March 19, 2024Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Hsin-Yi Lee, Cheng-Lung Hung, Chi On Chui
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Publication number: 20240074136Abstract: A static random access memory (SRAM) periphery circuit includes a first n-type transistor and a second n-type transistor that are disposed in a first well region of first conductivity type, the first well region occupies a first distance in a row direction equal to a bitcell-pitch of an SRAM array. The SRAM periphery circuit includes a first p-type transistor and a second p-type transistor that are disposed in a second well region of second conductivity type. The second well region occupies a second distance in the row direction equal to the bitcell-pitch of the SRAM array. The second well region is disposed adjacent to the first well region in the row direction.Type: ApplicationFiled: November 9, 2023Publication date: February 29, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yangsyu LIN, Chi-Lung LEE, Chien-Chi TIEN, Chiting CHENG
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Patent number: 11916114Abstract: A device includes a first nanostructure; a second nanostructure over the first nanostructure; a first high-k gate dielectric around the first nanostructure; a second high-k gate dielectric around the second nanostructure; and a gate electrode over the first and second high-k gate dielectrics. The gate electrode includes a first work function metal; a second work function metal over the first work function metal; and a first metal residue at an interface between the first work function metal and the second work function metal, wherein the first metal residue has a metal element that is different than a metal element of the first work function metal.Type: GrantFiled: June 30, 2022Date of Patent: February 27, 2024Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Hsin-Yi Lee, Cheng-Lung Hung, Chi On Chui
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Patent number: 11916124Abstract: A device includes a first nanostructure; a second nanostructure over the first nanostructure; a first high-k gate dielectric disposed around the first nanostructure; a second high-k gate dielectric being disposed around the second nanostructure; and a gate electrode over the first high-k gate dielectric and the second high-k gate dielectric. A portion of the gate electrode between the first nanostructure and the second nanostructure comprises a first portion of a p-type work function metal filling an area between the first high-k gate dielectric and the second high-k gate dielectric.Type: GrantFiled: April 11, 2022Date of Patent: February 27, 2024Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Hsin-Yi Lee, Ji-Cheng Chen, Cheng-Lung Hung, Chi On Chui
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Patent number: 11856747Abstract: A static random access memory (SRAM) periphery circuit includes a first n-type transistor and a second n-type transistor that are disposed in a first well region of first conductivity type, the first well region occupies a first distance in a row direction equal to a bitcell-pitch of an SRAM array. The SRAM periphery circuit includes a first p-type transistor and a second p-type transistor that are disposed in a second well region of second conductivity type. The second well region occupies a second distance in the row direction equal to the bitcell-pitch of the SRAM array. The second well region is disposed adjacent to the first well region in the row direction.Type: GrantFiled: May 23, 2022Date of Patent: December 26, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Yangsyu Lin, Chi-Lung Lee, Chien-Chi Tien, Chiting Cheng
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Publication number: 20220285370Abstract: A static random access memory (SRAM) periphery circuit includes a first n-type transistor and a second n-type transistor that are disposed in a first well region of first conductivity type, the first well region occupies a first distance in a row direction equal to a bitcell-pitch of an SRAM array. The SRAM periphery circuit includes a first p-type transistor and a second p-type transistor that are disposed in a second well region of second conductivity type. The second well region occupies a second distance in the row direction equal to the bitcell-pitch of the SRAM array. The second well region is disposed adjacent to the first well region in the row direction.Type: ApplicationFiled: May 23, 2022Publication date: September 8, 2022Inventors: Yangsyu LIN, Chi-Lung LEE, Chien-Chi TIEN, Chiting CHENG
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Patent number: 11342340Abstract: A static random access memory (SRAM) periphery circuit includes a first n-type transistor and a second n-type transistor that are disposed in a first well region of first conductivity type, the first well region occupies a first distance in a row direction equal to a bitcell-pitch of an SRAM array. The SRAM periphery circuit includes a first p-type transistor and a second p-type transistor that are disposed in a second well region of second conductivity type. The second well region occupies a second distance in the row direction equal to the bitcell-pitch of the SRAM array. The second well region is disposed adjacent to the first well region in the row direction.Type: GrantFiled: October 26, 2020Date of Patent: May 24, 2022Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Yangsyu Lin, Chi-Lung Lee, Chien-Chi Tien, Chiting Cheng
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Publication number: 20210057423Abstract: A static random access memory (SRAM) periphery circuit includes a first n-type transistor and a second n-type transistor that are disposed in a first well region of first conductivity type, the first well region occupies a first distance in a row direction equal to a bitcell-pitch of an SRAM array. The SRAM periphery circuit includes a first p-type transistor and a second p-type transistor that are disposed in a second well region of second conductivity type. The second well region occupies a second distance in the row direction equal to the bitcell-pitch of the SRAM array. The second well region is disposed adjacent to the first well region in the row direction.Type: ApplicationFiled: October 26, 2020Publication date: February 25, 2021Inventors: Yangsyu LIN, Chi-Lung LEE, Chien-Chi TIEN, Chiting CHENG
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Patent number: 10818677Abstract: A static random access memory (SRAM) periphery circuit includes a first n-type transistor and a second n-type transistor that are disposed in a first well region of first conductivity type, the first well region occupies a first distance in a row direction equal to a bitcell-pitch of an SRAM array. The SRAM periphery circuit includes a first p-type transistor and a second p-type transistor that are disposed in a second well region of second conductivity type. The second well region occupies a second distance in the row direction equal to the bitcell-pitch of the SRAM array. The second well region is disposed adjacent to the first well region in the row direction.Type: GrantFiled: July 3, 2019Date of Patent: October 27, 2020Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Yangsyu Lin, Chi-Lung Lee, Chien-Chi Tien, Chiting Cheng
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Patent number: 10705283Abstract: A light source module including a first light guide plate, a first light source, a second light guide plate, a second light source, and a turning film is provided. The first light guide plate and the second light guide plate are sequentially stacked up. The second light guide plate is disposed between the first light guide plate and the turning film. The turning film has a plurality of prism columns, the prism columns face the second light guide plate. The first light guide plate includes a first light exiting surface, the first light exiting surface is located at a side facing the turning film and has a plurality of lenticular lens structures. The lenticular lens structures are arranged along a first direction and extended along a second direction perpendicular to the first direction. Besides, a display apparatus is also provided.Type: GrantFiled: March 3, 2017Date of Patent: July 7, 2020Assignee: Nano Precision Taiwan LimitedInventors: Kuan-Wen Liu, Chi-Lung Lee, Hao-Jan Kuo
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Publication number: 20200020700Abstract: A static random access memory (SRAM) periphery circuit includes a first n-type transistor and a second n-type transistor that are disposed in a first well region of first conductivity type, the first well region occupies a first distance in a row direction equal to a bitcell-pitch of an SRAM array. The SRAM periphery circuit includes a first p-type transistor and a second p-type transistor that are disposed in a second well region of second conductivity type. The second well region occupies a second distance in the row direction equal to the bitcell-pitch of the SRAM array. The second well region is disposed adjacent to the first well region in the row direction.Type: ApplicationFiled: July 3, 2019Publication date: January 16, 2020Inventors: Yangsyu LIN, Chi-Lung LEE, Chien-Chi TIEN, Chiting CHENG
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Patent number: 10011631Abstract: The present disclosure relates to the design and generation of stapled helical peptides that perturb protein-protein interactions (PPIs). The methods disclosed herein for preparing stapled peptides involve providing a peptide having a first amino acid that is functionalized with a salicylaldehyde ester side group and a second amino acid functionalized with a 1,2-hydroxyl amine side group; reacting the first and second amino acids to generate an N,O-benzylidene acetal moiety; and performing acidolysis of the resultant N,O-benzylidene acetal moiety to generate the stapled peptide. In many forms, the stapled helical peptides described herein are not hydrophobic.Type: GrantFiled: November 29, 2016Date of Patent: July 3, 2018Assignee: The University of Hong KongInventors: Xuechen Li, Chi-Lung Lee, Jiaochao Xu
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Publication number: 20170261672Abstract: A light source module including a first light guide plate, a first light source, a second light guide plate, a second light source, and a turning film is provided. The first light guide plate and the second light guide plate are sequentially stacked up. The second light guide plate is disposed between the first light guide plate and the turning film. The turning film has a plurality of prism columns, the prism columns face the second light guide plate. The first light guide plate includes a first light exiting surface, the first light exiting surface is located at a side facing the turning film and has a plurality of lenticular lens structures. The lenticular lens structures are arranged along a first direction and extended along a second direction perpendicular to the first direction. Besides, a display apparatus is also provided.Type: ApplicationFiled: March 3, 2017Publication date: September 14, 2017Applicant: Young Lighting Technology Inc.Inventors: Kuan-Wen Liu, Chi-Lung Lee, Hao-Jan Kuo
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Publication number: 20170152286Abstract: The present disclosure relates to the design and generation of stapled helical peptides that perturb protein-protein interactions (PPIs). The methods disclosed herein for preparing stapled peptides involve providing a peptide having a first amino acid that is functionalized with a salicylaldehyde ester side group and a second amino acid functionalized with a 1,2-hydroxyl amine side group; reacting the first and second amino acids to generate an N,O-benzylidene acetal moiety; and performing acidolysis of the resultant N,O-benzylidene acetal moiety to generate the stapled peptide. In many forms, the stapled helical peptides described herein are not hydrophobic.Type: ApplicationFiled: November 29, 2016Publication date: June 1, 2017Inventors: Xuechen Li, Chi-Lung Lee, Jiaochao Xu