Patents by Inventor Chi-Min Liao

Chi-Min Liao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240128626
    Abstract: A transmission device includes a daisy chain structure composed of at least three daisy chain units arranged periodically and continuously. Each of the daisy chain units includes first, second and third conductive lines, and first and second conductive pillars. The first and second conductive lines at a first layer extend along a first direction and are discontinuously arranged. The third conductive line at a second layer extends along the first direction and is substantially parallel to the first and second conductive lines. The first conductive pillar extends in a second direction. The second direction is different from the first direction. A first part of the first conductive pillar is connected to the first and third conductive lines. The second conductive pillar extends in the second direction. A first part of the second conductive pillar is connected to the second and third conductive lines.
    Type: Application
    Filed: November 25, 2022
    Publication date: April 18, 2024
    Applicants: UNIMICRON TECHNOLOGY CORP., National Taiwan University
    Inventors: Yu-Kuang WANG, Ruey-Beei Wu, Ching-Sheng Chen, Chun-Jui Huang, Wei-Yu Liao, Chi-Min Chang
  • Publication number: 20240130038
    Abstract: A transmission device for suppressing the glass-fiber effect includes a circuit board and a transmission line. The circuit board includes a plurality of glass fibers, so as to define a fiber pitch. The transmission line is disposed on the circuit board. The transmission line includes a plurality of non-parallel segments. Each of the non-parallel segments of the transmission line has an offset distance with respect to a reference line. The offset distance is longer than or equal to a half of the fiber pitch.
    Type: Application
    Filed: November 23, 2022
    Publication date: April 18, 2024
    Applicants: UNIMICRON TECHNOLOGY CORP., National Taiwan University
    Inventors: Chin-Hsun WANG, Ruey-Beei Wu, Ching-Sheng Chen, Chun-Jui Hung, Wei-Yu Liao, Chi-Min Chang
  • Patent number: 11676494
    Abstract: The present invention discloses a vessel collision avoiding system and method based on Artificial Potential Field algorithm, the method comprises the following steps: (S1) obtaining a vessel information, at least one obstacle information and a target information; (S2) establishing an Artificial Potential Field (APF) by the vessel information, the at least one obstacle information and the target information, wherein the Artificial Potential Field comprises an attractive field of the target and a repulsive field of the obstacle; (S3) combining the attractive field and the repulsive field to obtain a first resultant force; (S4) Adding an external force to the Artificial Potential Field based on the vessel information or the obstacle information; (S5) combining the first resultant force and the external force to obtain a second resultant force; and (S6) the vessel sails in the direction of the second resultant force to avoid the obstacle.
    Type: Grant
    Filed: March 23, 2020
    Date of Patent: June 13, 2023
    Assignee: SHIP AND OCEAN INDUSTRIES R&D CENTER
    Inventors: Feng-Yeang Chung, Chun-Han Chu, Chi-Min Liao, Mu-Hua Chen, Ling-Ji Mu, Li-Yuan Zhang, Sheng-Wei Huang
  • Publication number: 20220171062
    Abstract: This invention discloses an inland river Lidar navigation system for vessels, comprising a receiver, a memory, a processor and a display. The processor coupled to the receiver and the memory, and the display coupled to the processor. Overall, the inland river navigation Lidar system based on Lidar is able to make use of the preset map data identification uncalculatable points of a point cloud of the predetermined procedure, thereby removing of the alignment step in traditional method can be omitted. Therefore, the processing speed can be improved.
    Type: Application
    Filed: May 4, 2021
    Publication date: June 2, 2022
    Inventors: MING-HSIANG HSU, CHI-MIN LIAO, CHUN-HAN CHU
  • Publication number: 20210295708
    Abstract: The present invention discloses a vessel collision avoiding system and method based on Artificial Potential Field algorithm, the method comprises the following steps: (S1) obtaining a vessel information, at least one obstacle information and a target information; (S2) establishing an Artificial Potential Field (APF) by the vessel information, the at least one obstacle information and the target information, wherein the Artificial Potential Field comprises an attractive field of the target and a repulsive field of the obstacle; (S3) combining the attractive field and the repulsive field to obtain a first resultant force; (S4) Adding an external force to the Artificial Potential Field based on the vessel information or the obstacle information; (S5) combining the first resultant force and the external force to obtain a second resultant force; and (S6) the vessel sails in the direction of the second resultant force to avoid the obstacle.
    Type: Application
    Filed: March 23, 2020
    Publication date: September 23, 2021
    Inventors: FENG-YEANG CHUNG, CHUN-HAN CHU, CHI-MIN LIAO, MU-HUA CHEN, LING-JI MU, LI-YUAN ZHANG, SHENG-WEI HUANG
  • Publication number: 20210191400
    Abstract: The present invention discloses an autonomous vessel simulation system, comprising an environment model building system, a vessel model building system and a central processing system. The environment model building system builds at least one environment model; the vessel model building system builds at least one vessel model and an operation module of the central processing system integrates the environment model and the vessel model. The vessel model is navigated in the environment model according to at least one navigational parameter, and a display module displays the navigation status of the vessel model. In addition, an operating method of the autonomous vessel simulation system is also provided.
    Type: Application
    Filed: December 4, 2020
    Publication date: June 24, 2021
    Inventors: FENG-YEANG CHUNG, CHUN-HAN CHU, CHIA-CHUAN OU, MING-HSIANG HSU, CHUN-JUNG CHEN, CHI-MIN LIAO, YING-CHAO LIAO
  • Patent number: 9633841
    Abstract: Methods for depositing an amorphous silicon layer on wafers are disclosed. A process wafer, a control wafer, and a dummy wafer may be loaded into a chamber where an amorphous silicon layer may be deposited on the process wafer. Afterwards, the process wafer and the control wafer may be removed from the chamber. The chamber and the dummy wafers are dry cleaned together. The dry cleaned dummy wafers are used in the next run for depositing amorphous silicon layer. The process may be controlled by a computer system issuing a control job comprising a first process job and a second process job, wherein the first process job is to deposit an amorphous silicon layer on the process wafer, and the second process job is to dry clean the chamber and the dummy wafer.
    Type: Grant
    Filed: July 18, 2014
    Date of Patent: April 25, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventor: Chi-Min Liao
  • Publication number: 20150100016
    Abstract: A manual breast pump is provided with an applicator cup; and a rounded, curved member including a plurality of projections and a coupling releasably secured to the applicator cup. Any two adjacent ones of the projections are separated by a gap. Advantageously, the gaps provide a space to accommodate a flexible deformation of the rounded, curved member when a pumping force is exerted on the breast of a lactating by the pressing.
    Type: Application
    Filed: October 4, 2013
    Publication date: April 9, 2015
    Applicant: Summill International Corp.
    Inventor: Chi-Min Liao
  • Publication number: 20140329375
    Abstract: Methods for depositing an amorphous silicon layer on wafers are disclosed. A process wafer, a control wafer, and a dummy wafer may be loaded into a chamber where an amorphous silicon layer may be deposited on the process wafer. Afterwards, the process wafer and the control wafer may be removed from the chamber. The chamber and the dummy wafers are dry cleaned together. The dry cleaned dummy wafers are used in the next run for depositing amorphous silicon layer. The process may be controlled by a computer system issuing a control job comprising a first process job and a second process job, wherein the first process job is to deposit an amorphous silicon layer on the process wafer, and the second process job is to dry clean the chamber and the dummy wafer.
    Type: Application
    Filed: July 18, 2014
    Publication date: November 6, 2014
    Inventor: Chi-Min Liao
  • Patent number: 8785303
    Abstract: Methods for depositing an amorphous silicon layer on wafers are disclosed. A process wafer, a control wafer, and a dummy wafer may be loaded into a chamber where an amorphous silicon layer may be deposited on the process wafer. Afterwards, the process wafer and the control wafer may be removed from the chamber. The chamber and the dummy wafers are dry cleaned together. The dry cleaned dummy wafers are used in the next run for depositing amorphous silicon layer. The process may be controlled by a computer system issuing a control job comprising a first process job and a second process job, wherein the first process job is to deposit an amorphous silicon layer on the process wafer, and the second process job is to dry clean the chamber and the dummy wafer.
    Type: Grant
    Filed: June 1, 2012
    Date of Patent: July 22, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventor: Chi-Min Liao
  • Publication number: 20130323914
    Abstract: Methods for depositing an amorphous silicon layer on wafers are disclosed. A process wafer, a control wafer, and a dummy wafer may be loaded into a chamber where an amorphous silicon layer may be deposited on the process wafer. Afterwards, the process wafer and the control wafer may be removed from the chamber. The chamber and the dummy wafers are dry cleaned together. The dry cleaned dummy wafers are used in the next run for depositing amorphous silicon layer. The process may be controlled by a computer system issuing a control job comprising a first process job and a second process job, wherein the first process job is to deposit an amorphous silicon layer on the process wafer, and the second process job is to dry clean the chamber and the dummy wafer.
    Type: Application
    Filed: June 1, 2012
    Publication date: December 5, 2013
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventor: Chi-Min Liao
  • Patent number: 7196419
    Abstract: A semiconductor processing system utilizing transport speed monitoring of a wafer boat. The semiconductor processing comprises a process chamber, loading device, and transport speed monitoring device. The loading device transports a boat of wafers into and out of the process chamber where the wafers experience particular treatment. The transport speed monitoring device is responsible for detecting the movement of the wafer boat and asserting an abnormality signal when the transport speed of the wafer boat falls beyond a limit.
    Type: Grant
    Filed: May 4, 2004
    Date of Patent: March 27, 2007
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventor: Chi-Min Liao
  • Publication number: 20050282298
    Abstract: A semiconductor processing system utilizing transport speed monitoring of a wafer boat. The semiconductor processing comprises a process chamber, loading device, and transport speed monitoring device. The loading device transports a boat of wafers into and out of the process chamber where the wafers experience particular treatment. The transport speed monitoring device is responsible for detecting the movement of the wafer boat and asserting an abnormality signal when the transport speed of the wafer boat falls beyond a limit.
    Type: Application
    Filed: May 4, 2004
    Publication date: December 22, 2005
    Inventor: Chi-Min Liao