Abstract: A 3D memory array in which epitaxial source/drain regions which are horizontally merged and vertically unmerged are used as source lines and bit lines and methods of forming the same are disclosed. In an embodiment, a memory array includes a first channel region over a semiconductor substrate; a first epitaxial region electrically coupled to the first channel region; a second epitaxial region directly over the first epitaxial region in a direction perpendicular to a major surface of the semiconductor substrate; a dielectric material between the first epitaxial region and the second epitaxial region, the second epitaxial region being isolated from the first epitaxial region by the dielectric material; a gate dielectric surrounding the first channel region; and a gate electrode surrounding the gate dielectric.

Abstract: A micro light-emitting diode display device includes a substrate, a first planarization layer, a first light-emitting element, and a second planarization layer. The first planarization layer is disposed on the substrate and has a first opening. The first opening has a first opening inner wall. The first light-emitting element is disposed on the substrate, in the first opening, and separated from the first opening inner wall. The second planarization layer is disposed on the substrate and between the first planarization layer and the first light-emitting element. The second planarization layer is in contact with the first light-emitting element.

Abstract: A method includes removing a first dummy gate structure to form a recess around a first nanostructure and a second nanostructure; depositing a sacrificial layer in the recess with a flowable chemical vapor deposition (CVD); and patterning the sacrificial layer to leave a portion of the sacrificial layer between the first nanostructure and the second nanostructure. The method further include depositing a first work function metal in first recess; removing the first work function metal and the portion of the sacrificial layer from the recess; depositing a second work function metal in the recess, wherein the second work function metal is of an opposite type than the first work function metal; and depositing a fill metal over the second work function metal in the recess.

Abstract: A semiconductor device includes a fin structure, a metal gate stack, a barrier structure and an epitaxial source/drain region. The fin structure is over a substrate. The metal gate stack is across the fin structure. The barrier structure is on opposite sides of the metal gate stack. The barrier structure comprises one or more passivation layers and one or more barrier layers, and the one or more passivation layers have a material different from a material of the one or more barrier layers. The epitaxial source/drain region is over the barrier structure.

Abstract: A semiconductor structure is provided. The semiconductor structure includes a substrate, a channel layer, a barrier layer, a compound semiconductor layer, a gate electrode, and a stack of dielectric layers. The channel layer is disposed on the substrate. The barrier layer is disposed on the channel layer. The compound semiconductor layer is disposed on the barrier layer. The gate electrode is disposed on the compound semiconductor layer. The stack of dielectric layers is disposed on the gate electrode. The stack of dielectric layers includes layers having different etching rates.

Abstract: A blood pressure detection device manufactured by a semiconductor process includes a substrate, a microelectromechanical element, a gas-pressure-sensing element, a driving-chip element, an encapsulation layer and a valve layer. The substrate includes inlet apertures. The microelectromechanical element and the gas-pressure-sensing element are stacked and integrally formed on the substrate. The encapsulation layer is encapsulated and positioned on the substrate. A flowing-channel space is formed above the microelectromechanical element and the gas-pressure-sensing element. The encapsulation layer includes an outlet aperture in communication with an airbag. The driving-chip element controls the microelectromechanical element, the gas-pressure-sensing element and valve units to transport gas.

Abstract: A gas detection purification device is disclosed and includes a main body, a purification unit, a gas guider, a gas detection module and a controlling-driving module. The main body includes an inlet, an outlet, an external socket and a gas-flow channel disposed between the inlet and the outlet. The purification unit is disposed in the gas-flow channel for filtering gas introduced through the gas-flow channel. The gas guider is disposed in the gas channel and located at a side of the purification unit. The gas is inhaled through the inlet, flows through the purification unit and is discharged out through the outlet. The gas detection module is plugged into or detached from the external socket. The controlling driving module is disposed within the main body and electrically connected to the gas guider to control the operation of the gas guider in an enabled state and a disabled state.

Abstract: This document describes a thermal-control system that is integrated into a security camera. The thermal-control system includes a combination of heatsinks and thermal interface materials with high thermal conductivities. The thermal-control system may transfer and spread energy from a high thermal-loading condition effectuated upon the security camera to concurrently maintain temperatures of multiple thermal zones on or within the security camera at or below prescribed temperature thresholds.

Abstract: This document describes a thermal-control system that is integrated into a security camera. The thermal-control system includes a combination of heatsinks and thermal interface materials with high thermal conductivities. The thermal-control system may transfer and spread energy from a high thermal-loading condition effectuated upon the security camera to concurrently maintain temperatures of multiple thermal zones on or within the security camera at or below prescribed temperature thresholds.

Abstract: Sensor-based privacy-event detection for a mounted electronic device is described. In aspects, a security system includes a head assembly removably and magnetically coupled to a mounting device having a magnet. The electronic device also includes a camera module and a sensor disposed within the housing. The sensor detects a magnetic field associated with the magnet when the head assembly is coupled to the mounting device. When a user detaches the head assembly from the mounting device (e.g., to recharge the electronic device), the sensor no longer detects the magnetic field and determines the occurrence of a privacy event, which is used to deactivate the camera module to prevent unintentional recordings during the privacy event.

Abstract: This document describes a thermal-control system that is integrated into a security camera. The thermal-control system includes a combination of heatsinks and thermal interface materials with high thermal conductivities. The thermal-control system may transfer and spread energy from a high thermal-loading condition effectuated upon the security camera to concurrently maintain temperatures of multiple thermal zones on or within the security camera at or below prescribed temperature thresholds.

Abstract: A device for checking aspects of equipment includes a display screen, a memory, a processor, and an equipment checking system in a computer. The system includes a control unit and a checklist generating unit. The display screen can display a checking interface of an equipment. The checking interface includes item information of items for checking corresponding to the equipment, a data inputting area, and first and second confirmation icons. Data arising from inspections and checks can be input into the data inputting area. The checklist generating unit generates a checklist of all items for checking and checks carried out in response to an operation on the first confirmation icon. The checklist includes information as to an equipment, data as to checks required, and data as to results of checks carried out.

Abstract: A desulfurization composition includes calcium oxide, silicon dioxide and aluminum oxide. The desulfurization composition is free of an alkali metal oxide. Aluminum oxide is present in an amount ranging from 20 to 26 wt % based on the total weight of the desulfurization composition, and the weight ratio of calcium oxide to aluminum oxide is within a range of 2.19 to 3. A method for desulfurizing molten steel using the desulfurization composition is also disclosed.

Abstract: A laminate circuit board with a multi-layer circuit structure which includes a substrate, a first circuit metal layer, a second circuit metal layer, a first nanometer plating layer, a second nanometer plating layer and a cover layer is disclosed. The first circuit metal layer is embedded in the substrate or formed on at least one surface of the substrate which is smooth. The first nanometer plating layer with a smooth surface covers the first circuit metal layer. The second nanometer plating layer is formed on the other surface of the substrate and fills up the opening in the cover layer to electrically connect the first circuit metal layer. The junction adhesion is improved by the chemical bonding between the nanometer plating layer and the cover layer/the substrate. Therefore, the circuit metal layer does not need to be roughened and the density of the circuit increases.

Abstract: A laminate circuit board structure from button up including a substrate, a circuit metal layer, a nanometer plating layer and a cover layer is disclosed. The nanometer plating layer is smooth a thickness of 5-40 nm, and can be directly forming on the outer surface of the circuit metal layer or manufactured by firstly forming the nanometer plating layer on a preforming substrate, then pressing the substrate against the nanometer plating layer, and finally removing the preforming substrate. The junction adhesion between the nanometer plating layer and the cover layer or the substrate is improved by chemical bonding. Therefore it does not need to roughen the circuit metal layer or reserve circuit width for compensation such that the density of the circuit increases and much more dense circuit can be implemented in the substrate with the same area.

Abstract: A method of manufacturing a laminate circuit board is disclosed. The method includes forming a metal layer on a substrate, patterning the metal layer to form a circuit metal layer, forming a nanometer plating layer with a thickness of 5 to 40 nm over the circuit metal layer, and forming a cover layer covering the substrate and the nanometer plating layer with improved adhesion by chemical bonding to form the laminate circuit board. Another method includes forming the circuit metal layer and the nanometer plating layer on a preforming substrate, pressing the preforming substrate against a substrate to push the circuit metal layer and the nanometer plating layer into the substrate, and removing the preforming substrate. By the present invention, the density of circuit is increased and much denser circuit can be implemented on the substrate with the same area.

Abstract: Systems and techniques to provide an improved reputation scoring for products in an online storefront are described. A technique may include obtaining at least one objective measure and at least one subjective measure about a product in an online storefront; calculating a reputation level for the product from the subjective and objective measures; and displaying a listing for the product in the online storefront according to the reputation level. A technique may further include providing feedback to product developers about the reputation level of the product. Other embodiments are described and claimed.

Abstract: A method for inhibiting the growth of a nickel-copper-tin intermetallic (i.e. (Ni,Cu)3Sn4) layer at the (Cu,Ni)6Sn5/nickel interface of a solder joint is described as follows. A Sn—Ag—Cu solder alloy with a Cu-content of 0.5˜1 weight percent (wt. %) is provided. The solder alloy is disposed on a surface finish of a soldering pad, having a nickel-based metallization layer. A material of the solder alloy further includes palladium. The solder alloy is joined with the surface finish, so as to form the solder joint containing palladium that enables to inhibit the growth of the undesired (Ni,Cu)3Sn4 layer between the (Cu,Ni)6Sn5 and nickel in the subsequent use at temperatures ranging from 100° C. to 180° C.

Abstract: A method for inhibiting the growth of a nickel-copper-tin intermetallic (i.e. (Ni,Cu)3Sn4) layer at the (Cu,Ni)6Sn5/nickel interface of a solder joint is described as follows. A Sn—Ag—Cu solder alloy with a Cu-content of 0.5˜1 weight percent (wt. %) is provided. The solder alloy is disposed on a surface finish of a soldering pad, having a nickel-based metallization layer. A material of the solder alloy further includes palladium. The solder alloy is joined with the surface finish, so as to form the solder joint containing palladium that enables to inhibit the growth of the undesired (Ni,Cu)3Sn4 layer between the (Cu,Ni)6Sn5 and nickel in the subsequent use at temperatures ranging from 100° C. to 180° C.

Abstract: Computing systems can be dynamically configured, allocated, and deployed based on user requirements. For example, a user can request a number of servers for dynamic configuration, allocation, and deployment. Embodiments provide a quick and efficient way for users to test code and programs, debug code and programs, and/or perform other configuration and testing operations using one or more computing systems, such as a cluster of servers. Reserved systems are dynamically configured with necessary code and/or content according to user requirements. The reserved cluster of systems can be returned to an available pool once a reservation expires, allowing the returned systems to be used for a subsequent reservation.