Patents by Inventor Chi Ming To
Chi Ming To has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20250147417Abstract: A method of manufacturing a semiconductor device includes forming a photoresist layer over a substrate. A first precursor and a second precursor are combined. The first precursor is an organometallic having a formula: MaRbXc, where M is one or more of Sn, Bi, Sb, In, and Te, R is one or more of a C7-C11 aralkyl group, a C3-C10 cycloalkyl group, a C2-C10 alkoxy group, and a C2-C10 alkylamino group, X is one or more of a halogen, a sulfonate group, and an alkylamino group, and 1?a?2, b?1, c?1, and b+c?4, and the second precursor is one or more of water, an amine, a borane, and a phosphine. The photoresist layer is selectively exposed to actinic radiation to form a latent pattern. The latent pattern is developed by applying a developer to the selectively exposed photoresist layer.Type: ApplicationFiled: December 30, 2024Publication date: May 8, 2025Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chih-Cheng LIU, Ming-Hui WENG, Jr-Hung LI, Yahru CHENG, Chi-Ming YANG, Tze-Liang LEE, Ching-Yu CHANG
-
Publication number: 20250148273Abstract: In an aspect of the disclosure, a method for detecting outlier integrated circuits on a wafer is provided. The method comprises: operating multiple test items for each IC on the wafer to generate measured values of the multiple test items for each IC; selecting a target IC and neighboring ICs on the wafer repeatedly. each time after selecting the target IC executes the following steps: selecting a measured value of the target IC as a target measured value and selecting measured values of the target IC and the neighboring ICs as feature values of the target IC and the neighboring ICs; executing a transformer deep learning model to generate a predicted value of the target measured value; and identifying outlier ICs according to the predicted values of all the target ICs and the corresponding target measured values of all the target ICs.Type: ApplicationFiled: October 25, 2024Publication date: May 8, 2025Inventors: Khim Jun Koh, Chi-Ming Lee, Yi-Ju Ting, Chung-Kai Chang, Po-Chao Tsao, Chin-Wei Lin, Yu-Lin Yang, Tung-Hsing Lee, Chin-Tang Lai
-
Publication number: 20250151464Abstract: An LED and a light emitting device are provided, which includes an epitaxial structure, a transparent conductive layer, an insulating structure and a metal reflective layer. The epitaxial structure includes a first semiconductor layer, an active layer and a second semiconductor layer. The transparent conductive layer is disposed on the second semiconductor layer. The insulating structure is disposed on the transparent conductive layer, and an opening is defined in the insulating structure. The transparent conductive layer is exposed from the opening. A step portion is formed on a sidewall of the opening, and divides the opening into a first opening and a second opening. An opening width of the first opening is smaller than that of the second opening. The metal reflective layer is disposed on the insulating structure. The metal reflective layer fills the first opening and the second opening, and forms electrical contact with the second semiconductor layer.Type: ApplicationFiled: November 5, 2024Publication date: May 8, 2025Inventors: XIUSHAN ZHU, YAN LI, QI JING, Zhihao BAO, Qingchao YANG, Chunhsien LEE, Chi-Ming TSAI, Juchin TU, Chung-Ying CHANG
-
Patent number: 12293969Abstract: A semiconductor structure includes a substrate including a first surface; a dielectric layer disposed over the first surface of the substrate; a first conductive line surrounded by the dielectric layer and extended over the first surface of the substrate; a second conductive line disposed adjacent to the first conductive line, surrounded by the dielectric layer and extended parallel to the first conductive line; a conductive via disposed over the first conductive line and extended through the dielectric layer; and a cross section of the conductive via substantially parallel to the first surface of the substrate, wherein the cross section of the conductive via is at least partially protruded from the first conductive line towards the second conductive line. Further, a method of manufacturing the semiconductor structure is also disclosed.Type: GrantFiled: July 29, 2022Date of Patent: May 6, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Chi-Ta Lu, Chi-Ming Tsai
-
Publication number: 20250136629Abstract: Cyclometalated iron (II) complexes as photothermal transduction agents are described herein. The disclosed complexes show high structural robustness and significant absorption in the near-infrared (NIR) and visible regions. The described complexes can self-assemble to form metallosupramolecular particles, which have excellent photothermal performance and can target tumor by EPR effect. For example, the Fe NPs disclosed herein have strong near-infrared (NIR) absorbance with high photo-heat conversion efficiency of at least 30% (such as about 60%) and/or superior photothermal stability under near-infrared (e.g., 808 nm) laser irradiation. The Fe NPs may be coated with a coating agent, such as bovine serum albumin, to form a coated Fe NPs, which can further enhance the tumor accumulations and biocompatibility of the metallosupramolecular particles in vivo.Type: ApplicationFiled: October 25, 2024Publication date: May 1, 2025Inventors: Chi-Ming Che, Penghe Zhao, Zhou Tang
-
Patent number: 12288729Abstract: In an embodiment, a device includes: an integrated circuit die; an encapsulant at least partially surrounding the integrated circuit die, the encapsulant including fillers having an average diameter; a through via extending through the encapsulant, the through via having a lower portion of a constant width and an upper portion of a continuously decreasing width, a thickness of the upper portion being greater than the average diameter of the fillers; and a redistribution structure including: a dielectric layer on the through via, the encapsulant, and the integrated circuit die; and a metallization pattern having a via portion extending through the dielectric layer and a line portion extending along the dielectric layer, the metallization pattern being electrically coupled to the through via and the integrated circuit die.Type: GrantFiled: February 7, 2024Date of Patent: April 29, 2025Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Tzu-Sung Huang, Ming Hung Tseng, Yen-Liang Lin, Hao-Yi Tsai, Chi-Ming Tsai, Chung-Shi Liu, Chih-Wei Lin, Ming-Che Ho
-
Patent number: 12287380Abstract: Sensor-based privacy-event detection for a mounted electronic device is described. In aspects, a security system includes a head assembly removably and magnetically coupled to a mounting device having a magnet. The electronic device also includes a camera module and a sensor disposed within the housing. The sensor detects a magnetic field associated with the magnet when the head assembly is coupled to the mounting device. When a user detaches the head assembly from the mounting device (e.g., to recharge the electronic device), the sensor no longer detects the magnetic field and determines the occurrence of a privacy event, which is used to deactivate the camera module to prevent unintentional recordings during the privacy event.Type: GrantFiled: July 26, 2022Date of Patent: April 29, 2025Assignee: Google LLCInventors: Mark Benjamin Kraz, Aditya Shailesh Ghadiali, Kok Yen Cheng, Félix Ambroise Étienne Senepin, Chi-Ming Lin
-
Patent number: 12283541Abstract: A semiconductor package and a manufacturing method thereof are provided. The semiconductor package includes at least one semiconductor die, an interposer, a molding compound and connectors. The interposer has a first surface, a second surface opposite to the first surface and sidewalls connecting the first and second surfaces. The at least one semiconductor die is disposed on the first surface of interposer and electrically connected with the interposer. The molding compound is disposed over the interposer and laterally encapsulates the at least one semiconductor die. The molding compound laterally wraps around the interposer and the molding compound at least physically contacts a portion of the sidewalls of the interposer. The connectors are disposed on the second surface of the interposer, and are electrically connected with the at least one semiconductor die through the interposer.Type: GrantFiled: January 14, 2024Date of Patent: April 22, 2025Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chi-Ming Huang, Ping-Kang Huang, Sao-Ling Chiu, Shang-Yun Hou
-
Patent number: 12281065Abstract: Methods for asymmetric cis-dihydroxylation (“AD”) of quinones to produce cis-diols of quinones with high yield (i.e. a yield ?30%) and high enantioselectivity (i.e. an enantiometric excess ?30%) are disclosed. The method uses an iron-based catalyst, such as one or more Fe(II) complexes, as the catalyst, and can be performed under mild reaction conditions (e.g. a temperature ?50° C. at 1 atom in open air). The method generally includes: (i) maintaining a reaction mixture at a temperature for a period of time sufficient to form a product, where the reaction mixture contains a quinone, one or more iron-based catalyst(s), and a solvent, and where the product contains a chiral cis-diol. Optionally, the method also includes adding an oxidant into the reaction mixture prior to and/or during step (i), such as a hydrogen peroxide solution.Type: GrantFiled: January 17, 2023Date of Patent: April 22, 2025Assignees: Versitech Limited, Laboratory for Synthetic Chemistry and Chemical Biology LimitedInventors: Chi Ming Che, Tingting Wang, Haixu Wang
-
Patent number: 12283747Abstract: A dual-frequency antenna structure includes a substrate, and a grounding element, a conductive sheet, a transmitting antenna, and a receiving antenna that are disposed on the substrate. The transmitting antenna includes a first coupling conductive pad, a first conductive column that is electrically coupled to the first coupling conductive pad and the conductive sheet, and a first feeding conductive pad. The first feeding conductive pad can produce a capacitive effect with each of the first coupling conductive pad and the grounding element. The receiving antenna includes a second coupling conductive pad, a second conductive column that is electrically coupled to the second coupling conductive pad and the conductive sheet, and a second feeding conductive pad. The second feeding conductive pad can produce a capacitive effect with each of the second coupling conductive pad and the grounding element.Type: GrantFiled: April 21, 2023Date of Patent: April 22, 2025Assignee: AUDEN TECHNO CORPInventor: Chi-Ming Chiang
-
Patent number: 12278139Abstract: A manufacturing method of a semiconductor device includes at least the following steps. A sacrificial substrate is provided. An epitaxial layer is formed on the sacrificial substrate. An etch stop layer is formed on the epitaxial layer. Carbon atoms are implanted into the etch stop layer. A capping layer and a device layer are formed on the etch stop layer. A handle substrate is bonded to the device layer. The sacrificial substrate, the epitaxial layer, and the etch stop layer having the carbon atoms are removed from the handle substrate.Type: GrantFiled: August 1, 2023Date of Patent: April 15, 2025Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chi-Ming Chen, Kuei-Ming Chen, Po-Chun Liu, Chung-Yi Yu, Chia-Shiung Tsai
-
Publication number: 20250114298Abstract: The subject invention pertains to a long-term antigen depot that can bypass FBR and engage DCs to mature and migrate to lymph nodes to activate antigen-specific T-cell activations. Leveraging on the immunomodulatory properties of exogenous polysaccharides and the anti-fouling characteristics of zwitterionic phosphorylcholine (PC) polymer, the invention features a PC functionalized dextran (PCDX) hydrogel for long-term antigen delivery. PCDX in both injectable scaffold and microparticles (MPs) forms effectively evades FBR and provides slow release of antigens resulting in local enrichment of CD11c+ DCs at the MPs injection sites. DC cultured on PCDX exhibits strong immunogenic activation with high CD86, CD40, MHC-I/peptide complex. PCDX also generates DC with propensity in migration to lymph nodes, as well as antigen presentation to trigger both CD4+ and CD8+ arms of T-cell responses.Type: ApplicationFiled: October 7, 2024Publication date: April 10, 2025Inventors: Jin Teng CHUNG, Ying CHAU, Chi Ming Laurence LAU
-
Publication number: 20250120222Abstract: A light-emitting device includes a semiconductor epitaxial structure including a first semiconductor layer, an active layer, and a second semiconductor layer sequentially stacked in such order in a stacking direction, and including a plurality of through holes. The through holes extend downwardly in a direction from the second semiconductor layer to the first semiconductor layer. The through holes expose a portion of a surface of the first semiconductor layer. The light-emitting device has an ampacity. Each of the through holes has a first radius. A ratio of the first radius to the ampacity ranges from 0.1 to 0.4. A light-emitting apparatus including the light-emitting device is also provided.Type: ApplicationFiled: December 17, 2024Publication date: April 10, 2025Inventors: Sihe CHEN, Yashu ZANG, Weichun TSENG, Shaohua HUANG, Chi -Ming TSAI, Chung-ying CHANG, Su-Hui LIN, Siyi LONG
-
Publication number: 20250118569Abstract: A method includes following steps. A target layer is formed over a substrate. A first hard mask layer is formed over the target layer by a plasma generated using a first radio frequency generator and a second radio frequency generator. The first radio frequency generator and the second radio frequency generator have different powers. A second hard mask layer is formed over the first hard mask layer by a plasma generated using the first radio frequency generator without using the second radio frequency generator. A photoresist layer is formed over the second hard mask layer. The photoresist layer is exposed. The photoresist layer is developed. The first hard mask layer and the second hard mask layer are patterned using the photoresist layer as an etch mask. The target layer is patterned using the first hard mask layer and the second hard mask layer as an etch mask.Type: ApplicationFiled: October 5, 2023Publication date: April 10, 2025Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chih-Cheng LIU, Wei-Zhong CHEN, Chi-Ming YANG, Jr-Hung LI, Yung-Cheng LU
-
Publication number: 20250119709Abstract: Systems and methods are provided for monitoring a workforce within a site using a wireless mesh network.Type: ApplicationFiled: January 20, 2023Publication date: April 10, 2025Applicant: VOLAN TECHNOLOGY, INC.Inventors: Michael BETTUA, Timothy CHINOWSKY, Chi Ming TSE, Cameron TAHERI, Avery CUNNINGHAM, Andrew MARDER, Ka Kui CHENG, Wai Hey WILLIE IP, Kin Hin WONG
-
Publication number: 20250114431Abstract: The present invention provides a compound or derivatives thereof capable of lowering circulating glucose in a subject. The compound is a recombinant placenta-specific protein 9 (Plac9) or derivatives thereof that can enhance glucose uptake by liver cells or hepatocytes in an insulin-independent manner, thereby lowering the circulating glucose. The present invention also provides a composition including an effective amount of the compound or derivatives thereof and a method for treating diseases or conditions associated with or arising from high circulating glucose such as diabetes mellitus.Type: ApplicationFiled: October 10, 2023Publication date: April 10, 2025Inventors: Chi Ming WONG, Tak Ho LO
-
Patent number: 12272554Abstract: A method of manufacturing semiconductor device includes forming a multilayer photoresist structure including a metal-containing photoresist over a substrate. The multilayer photoresist structure includes two or more metal-containing photoresist layers having different physical parameters. The metal-containing photoresist is a reaction product of a first precursor and a second precursor, and each layer of the multilayer photoresist structure is formed using different photoresist layer formation parameters. The different photoresist layer formation parameters are one or more selected from the group consisting of the first precursor, an amount of the first precursor, the second precursor, an amount of the second precursor, a length of time each photoresist layer formation operation, and heating conditions of the photoresist layers.Type: GrantFiled: July 27, 2023Date of Patent: April 8, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Jia-Lin Wei, Ming-Hui Weng, Chih-Cheng Liu, Yi-Chen Kuo, Yen-Yu Chen, Yahru Cheng, Jr-Hung Li, Ching-Yu Chang, Tze-Liang Lee, Chi-Ming Yang
-
Patent number: 12271113Abstract: Method of manufacturing semiconductor device includes forming photoresist layer over substrate. Forming photoresist layer includes combining first precursor and second precursor in vapor state to form photoresist material, wherein first precursor is organometallic having formula: MaRbXc, where M at least one of Sn, Bi, Sb, In, Te, Ti, Zr, Hf, V, Co, Mo, W, Al, Ga, Si, Ge, P, As, Y, La, Ce, Lu; R is substituted or unsubstituted alkyl, alkenyl, carboxylate group; X is halide or sulfonate group; and 1?a?2, b?1, c?1, and b+c?5. Second precursor is at least one of an amine, a borane, a phosphine. Forming photoresist layer includes depositing photoresist material over the substrate. The photoresist layer is selectively exposed to actinic radiation to form latent pattern, and the latent pattern is developed by applying developer to selectively exposed photoresist layer to form pattern.Type: GrantFiled: January 15, 2021Date of Patent: April 8, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chih-Cheng Liu, Yi-Chen Kuo, Jia-Lin Wei, Ming-Hui Weng, Yen-Yu Chen, Jr-Hung Li, Yahru Cheng, Chi-Ming Yang, Tze-Liang Lee, Ching-Yu Chang
-
Publication number: 20250110897Abstract: System and method for training and performing operations (e.g., read and write operations) on a double buffered memory topology. In some embodiments, eight DIMMs are coupled to a single channel. The training and operations schemes are configured with timing and signaling to allow training and operations with the double buffered memory topology. In some embodiments, the double buffered memory topology includes one or more buffers on a system board (e.g., motherboard).Type: ApplicationFiled: October 9, 2024Publication date: April 3, 2025Inventors: Chi-Ming Yeung, Yoshie Nakabayashi, Thomas Giovannini, Henry Stracovsky
-
Publication number: 20250102498Abstract: A lipophilic anchor includes a conjugation domain linked via a linker domain to an anchor domain having a plurality of hydrophobic tails. This lipophilic anchor allows deposition of at least one lipophilic target molecule with affinity for the anchor domain on a hydrophilic surface conjugated to the conjugation domain. The lipophilic target molecule coated hydrophilic substrate has the conjugation domain of the lipophilic anchor bound to the hydrophilic surface of a substrate and lipophilic target molecules are non-covalently bound to the anchor domain.Type: ApplicationFiled: July 13, 2023Publication date: March 27, 2025Inventors: Ying CHAU, Chi Ming Laurence LAU, Jin Teng CHUNG, Manisha Sandupama ABESEKARA