Abstract: A semiconductor light emitting device includes a multi-quantum-well structure, a first capping layer, a second capping layer, and an electron barrier layer stacked in order. The multi-quantum-well structure includes a plurality of alternately-stacked potential barrier layers and potential well layers. The first capping layer is a semiconductor layer, and the second capping layer is a p-doped semiconductor layer. Each of the first and second capping layers has an aluminum mole fraction larger than that of each of the potential barrier layers, and the aluminum mole fraction of the first capping layer is larger than that of at least a portion of the electron barrier layer. A method for preparing the semiconductor light emitting device is also provided.

Abstract: A light emitting diode is provided. The light emitting diode includes: a semiconductor stack, including a first semiconductor layer, a second semiconductor layer, and an active layer located between the first semiconductor layer and the second semiconductor layer; a first insulating layer, formed on the semiconductor stack; a reflective electrode layer, partially formed on the first insulating layer, wherein a minimum distance between an edge of the reflective electrode layer and the semiconductor stack is a fourth distance, and the fourth distance is in a range of 1 ?m to 5 ?m; and a fourth insulating layer, formed on the reflective electrode layer, wherein the fourth insulating layer is aluminum oxide.

Abstract: Disclosed are a semiconductor epitaxial structure, a preparation method thereof, and a light-emitting diode. The semiconductor epitaxial structure includes a buffer layer, an N-type semiconductor layer, an active layer, and a P-type semiconductor layer that are sequentially arranged on a substrate. The material of the buffer layer is AlxInyGa(1-x-y)N, wherein 0x and 0?y. The buffer layer is doped with carbon impurities. The doping concentration of the carbon impurities in the buffer layer is lower than 9E17 atoms/cm3. The present invention grows the buffer layer using a high-temperature growth method. The buffer layer has a lower defect density and a lower content of carbon impurities, making it more possible to facilitate enhancement of the lattice quality of the subsequent epitaxial structure and improve the luminous efficiency and anti-aging capability of the light-emitting diode.

Abstract: A method for forming a photomask includes following operations. A first photomask is received. The first photomask includes a first pattern and a first scattering bar. The first photomask is used to remove a first portion of a target layer to form a first opening and a second opening. The first opening corresponds to the first pattern, and the second opening corresponds to the first scattering bar. A second photomask is received. The second photomask includes a second pattern. The second photomask is used to remove a second portion of the target layer to form a third opening. The third opening corresponds to the second pattern. The second opening is widened to form the third opening using the second photomask.

Abstract: Disclosed is a multi-quantum well structure including a stress relief layer, an electron-collecting layer disposed on the stress relief layer, and an active layer including a first active layer unit that is disposed on the electron-collecting layer. The first active layer unit includes potential barrier sub-layers and potential well sub-layers being alternately stacked, in which at least one of the potential barrier sub-layers has a GaN/Alx1Iny1Ga(1-x1-y1)N stack, where 0<x1?1 and 0?y1<1. An LED device including the multi-quantum well structure is also disclosed.

Abstract: Embodiments described herein provide for a system, a software application, and a method of a lithography process to form a three-dimensional profile in a single exposure operation. An image projections system of a lithography system will provide a plurality of shots to a photoresist layer. To form a three-dimensional profile in the photoresist layer, a local shot density of a plurality of shots within an exposure area will be varied. The local shot density will determine a dose provided by the image projection system at each sub-grid of an exposure area. The dose will determine the thickness of a photoresist layer when the plurality of shots are projected to the photoresist layer.

Abstract: A semiconductor light emitting device includes a multi-quantum-well structure, a first capping layer, a second capping layer, and an electron barrier layer stacked in order. The multi-quantum-well structure includes a plurality of alternately-stacked potential barrier layers and potential well layers. The first capping layer is a semiconductor layer, and the second capping layer is a p-doped semiconductor layer. Each of the first and second capping layers has an aluminum mole fraction larger than that of each of the potential barrier layers, and the aluminum mole fraction of the first capping layer is larger than that of at least a portion of the electron barrier layer. A method for preparing the semiconductor light emitting device is also provided.

Abstract: An LED and a light emitting device are provided, which includes an epitaxial structure, a transparent conductive layer, an insulating structure and a metal reflective layer. The epitaxial structure includes a first semiconductor layer, an active layer and a second semiconductor layer. The transparent conductive layer is disposed on the second semiconductor layer. The insulating structure is disposed on the transparent conductive layer, and an opening is defined in the insulating structure. The transparent conductive layer is exposed from the opening. A step portion is formed on a sidewall of the opening, and divides the opening into a first opening and a second opening. An opening width of the first opening is smaller than that of the second opening. The metal reflective layer is disposed on the insulating structure. The metal reflective layer fills the first opening and the second opening, and forms electrical contact with the second semiconductor layer.

Abstract: A semiconductor structure includes a substrate including a first surface; a dielectric layer disposed over the first surface of the substrate; a first conductive line surrounded by the dielectric layer and extended over the first surface of the substrate; a second conductive line disposed adjacent to the first conductive line, surrounded by the dielectric layer and extended parallel to the first conductive line; a conductive via disposed over the first conductive line and extended through the dielectric layer; and a cross section of the conductive via substantially parallel to the first surface of the substrate, wherein the cross section of the conductive via is at least partially protruded from the first conductive line towards the second conductive line. Further, a method of manufacturing the semiconductor structure is also disclosed.

Abstract: In an embodiment, a device includes: an integrated circuit die; an encapsulant at least partially surrounding the integrated circuit die, the encapsulant including fillers having an average diameter; a through via extending through the encapsulant, the through via having a lower portion of a constant width and an upper portion of a continuously decreasing width, a thickness of the upper portion being greater than the average diameter of the fillers; and a redistribution structure including: a dielectric layer on the through via, the encapsulant, and the integrated circuit die; and a metallization pattern having a via portion extending through the dielectric layer and a line portion extending along the dielectric layer, the metallization pattern being electrically coupled to the through via and the integrated circuit die.

Abstract: A light-emitting device includes a semiconductor epitaxial structure including a first semiconductor layer, an active layer, and a second semiconductor layer sequentially stacked in such order in a stacking direction, and including a plurality of through holes. The through holes extend downwardly in a direction from the second semiconductor layer to the first semiconductor layer. The through holes expose a portion of a surface of the first semiconductor layer. The light-emitting device has an ampacity. Each of the through holes has a first radius. A ratio of the first radius to the ampacity ranges from 0.1 to 0.4. A light-emitting apparatus including the light-emitting device is also provided.

Abstract: A method includes receiving a pattern layout for a mask, shrinking the pattern layout to form a shrunk pattern, determining centerlines for each of a plurality of features within the shrunk pattern, and snapping the centerline for each of the plurality of features to a grid. The grid represents a minimum resolution size of a mask fabrication tool. The method further includes, after snapping the centerline for each of the plurality of features to the grid, fabricating the mask with the shrunk pattern.

Abstract: Embodiments of the present disclosure generally relate to lithography systems. More particularly, embodiments of the present disclosure relate to a method, a system, and a software application for a lithography process to control transmittance rate of write beams and write gray tone patterns in a single exposure operation. In one embodiment, a plurality of shots are provided by an image projection system in a lithography system to a photoresist layer. The plurality of shots exposes the photoresist layer to an intensity of light emitted from the image projection system. The local transmittance rate of the plurality of shots within an exposure area is varied to form varying step heights in the exposure area of the photoresist layer.

Abstract: A method is provided including directing a plurality of beams of radiation at a first area of a first layer on a substrate, each beam incident upon a different portion of a plurality of portions within the first area. Each portion has an area of a first size, the plurality of beams of radiation are directed at the first area based on a first pattern, the first pattern comprises a plurality of unit cells that include a plurality of on cells and a plurality of off cells, each unit cell has an area smaller than the first size, the plurality of on cells identify locations within the first area at which a beam of radiation of the plurality of beams of radiation is centrally focused, and the plurality of off cells identify locations within the first area at which no beam of radiation of the plurality of beams of radiation is centrally focused.

Abstract: A method for manufacturing a semiconductor device is provided. The method includes the following operations. A first layout including a plurality of first features is provided. A modified second layout is determined. The modified second layout includes a plurality of modified features separated from each other, and each of the plurality of modified features respectively overlaps each of the plurality of first features. The modified second layout is outputted to a photomask.

Abstract: A method includes receiving a pattern layout for a mask, shrinking the pattern layout to form a shrunk pattern, determining centerlines for each of a plurality of features within the shrunk pattern, and snapping the centerline for each of the plurality of features to a grid. The grid represents a minimum resolution size of a mask fabrication tool. The method further includes, after snapping the centerline for each of the plurality of features to the grid, fabricating the mask with the shrunk pattern.

Abstract: Embodiments of the present disclosure generally relate to lithography systems. More particularly, embodiments of the present disclosure relate to a method, a system, and a software application for a lithography process to control transmittance rate of write beams and write gray tone patterns in a single exposure operation. In one embodiment, a plurality of shots are provided by an image projection system in a lithography system to a photoresist layer. The plurality of shots exposes the photoresist layer to an intensity of light emitted from the image projection system. The local transmittance rate of the plurality of shots within an exposure area is varied to form varying step heights in the exposure area of the photoresist layer.

Abstract: A semiconductor device including: a first formation site and a second formation site for forming a first conductive bump and a second conductive bump; when a first environmental density corresponding to the first formation site is greater than a second environmental density corresponding to the second formation site, a cross sectional area of the second formation site is greater than a cross sectional area of the first formation site; wherein the first environmental density is determined by a number of formation sites around the first formation site in a predetermined range and the second environmental density is determined by a number of formation sites around the second formation site in the predetermined range; wherein a first area having the first environmental density forms an ellipse layout while a second area having the second environmental density forms a strip layout surrounding the ellipse layout.

Abstract: Embodiments of the present disclosure relate to methods, systems and apparatus for improving dose uniformity of the photolithography system. The method includes projecting a write beam from a projection unit toward a mask to form a plurality of incident lights, adjusting the projection unit to create a distribution of incidence angles corresponding to the incident lights, focusing the plurality of incident lights toward a photoresist layer disposed over a substrate with a lens, removing portions of the photoresist layer to form the device pattern, and forming structures on the substrate corresponding to the device pattern. The mask has a mask pattern corresponding to a device pattern. By focusing the plurality of incident lights towards the photoresist, a swing curve of the incident lights interfere to reduce a total swing curve of the incident lights to develop a photoresist layer with a photoresist pattern corresponding to the device pattern.

Abstract: A digital lithography system includes scan regions including a first scan region and a second scan region adjacent to the first scan region. The digital lithography system further includes exposure units located above the scan regions, a memory, and at least one processing device operatively coupled to the memory. The exposure units include a first exposure unit associated with the first scan region and a second exposure unit associated with the second scan region. The processing device is to perform operations including initiating a digital lithography process to pattern a substrate disposed on the stage in accordance with instructions, and performing exposure unit boundary smoothing with respect to the first and second exposure units during the digital lithography process.