Patents by Inventor Chi-Mo Huang

Chi-Mo Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100007643
    Abstract: The present invention provides a driving circuit. The driving circuit includes: an amount Z of first level shifting units, an amount B of second level shifting units, a first matrix decoding unit, an amount C of third level shifting units, an amount D of fourth level shifting units, a second matrix decoding unit, and a third matrix decoding unit. The driving circuit can generate an amount (Z×B)×(C×D) of high voltage digital output signals. The driving circuit provided by the present invention can significantly decrease the required high voltage elements (i.e. the level shifting units), and thus the present invention can reduce area of the driving circuit efficiently.
    Type: Application
    Filed: November 6, 2008
    Publication date: January 14, 2010
    Inventors: Po-Chang Wu, Wen-Chi Wu, Chi-Mo Huang
  • Publication number: 20090164859
    Abstract: A driving circuit of a display apparatus includes a decoder coupled to a plurality of scan lines of a display panel for decoding a plurality of input signals to output a plurality of scan line driving signals to thereby enable at least one scan line of the plurality of scan lines, and a plurality of control units (respectively coupled to the plurality of scan lines) for receiving an output enable signal to disable the plurality of scan lines during an interval between two scan lines being enabled.
    Type: Application
    Filed: March 4, 2008
    Publication date: June 25, 2009
    Inventors: Ming-Huang Liu, Wen-Chi Wu, Meng-Yong Lin, Bo-Chang Wu, Chi-Mo Huang
  • Publication number: 20090122451
    Abstract: The present invention discloses an ESD (ELECTRO-STATIC DISCHARGE) protection circuit device, the ESD (ELECTRO-STATIC DISCHARGE) protection circuit device includes a first switching device having a first terminal coupled to a first signal; a first control device coupled to the first signal for generating a first control signal according to the first signal; a second switching device having a first terminal coupled to a second signal, a second terminal coupled to a second terminal of the first switching device; and a second control device coupled to the second signal and a control terminal of the first switching device for generating a second control signal according to the second signal; wherein the first control signal coupled to the control terminal of the second switching device, and the second control signal coupled to the control terminal of the first switching device.
    Type: Application
    Filed: November 8, 2007
    Publication date: May 14, 2009
    Inventors: Meng-Yong Lin, Bo-Chang Wu, Wei-Yang Ou, Chi-Mo Huang
  • Patent number: 7515009
    Abstract: The present invention relates to an oscillating apparatus. The oscillating apparatus includes a biasing circuit, a multi-vibrator, a detecting circuit, and a selecting circuit. The biasing circuit is for generating a bias signal, wherein the biasing circuit includes a connecting port for using an impedance device to control an oscillating frequency or for directly connecting to external clock source as a reference clock. The multi-vibrator coupled to the biasing circuit for generating the oscillating frequency according to the quantity of the biasing signal. The detecting circuit coupled to the connecting port for generating a detecting signal whether the connecting port is coupled to the impedance device or the external clock source. The selecting circuit includes an AND gate coupled to the multi-vibrator and the selection signal and an OR gate coupled to the AND gate and the connecting port.
    Type: Grant
    Filed: October 30, 2006
    Date of Patent: April 7, 2009
    Assignee: Ili Technology Corp.
    Inventors: Wen-Chi Wu, Yao-Ching Wang, Chi-Mo Huang
  • Patent number: 7511556
    Abstract: The present invention discloses a multi-function circuit module having voltage level shifting function and data latching function via switching a plurality of switch elements. The multi-function circuit module includes a first circuit module, a fourth switch element, and a fifth switch module, wherein the first circuit module further includes a first switch module, a second switch module, and a third switch module. The multi-function circuit module can substantially reduce the circuit layout area. For example, when the multi-function circuit module of the present invention is applied in a source driving chip circuit, the multi-function circuit module can replace the original low-to-high voltage level shifting circuit and data latching circuit, so as to attain the purpose of reducing the chip area.
    Type: Grant
    Filed: August 24, 2007
    Date of Patent: March 31, 2009
    Assignee: ILI Technology Corp.
    Inventors: Ming-Huang Liu, Wei-Shan Chiang, Chen-Hsien Han, Chi-Mo Huang
  • Publication number: 20090051402
    Abstract: The present invention discloses a multi-function circuit module having voltage level shifting function and data latching function via switching a plurality of switch elements. The multi-function circuit module includes a first circuit module, a fourth switch element, and a fifth switch module, wherein the first circuit module further includes a first switch module, a second switch module, and a third switch module. The multi-function circuit module can substantially reduce the circuit layout area. For example, when the multi-function circuit module of the present invention is applied in a source driving chip circuit, the multi-function circuit module can replace the original low-to-high voltage level shifting circuit and data latching circuit, so as to attain the purpose of reducing the chip area.
    Type: Application
    Filed: August 24, 2007
    Publication date: February 26, 2009
    Inventors: Ming-Huang Liu, Wei-Shan Chiang, Chen-Hsien Han, Chi-Mo Huang
  • Publication number: 20080309654
    Abstract: A charge recycle system implemented in a liquid crystal display includes a common voltage source, a control unit, and a source driving circuit. Before the common voltage source switches its common voltage level, the control unit controls the common voltage source to let a voltage driving circuit of the common voltage source not coupled to the output end of the common voltage source, and sends a charge recycle enable signal to the source driving circuit to adjust the source voltage level. By boosting or pulling down the source voltage level, the charges stored in liquid crystal units of the liquid crystal display can be recycled to the common voltage source, therefore raising charge utilization efficiency and lowering power consumed by the liquid crystal display.
    Type: Application
    Filed: December 24, 2007
    Publication date: December 18, 2008
    Inventors: Chen-Hsien Han, Wei-Shan Chiang, Ming-Huang Liu, Wei-Yang Ou, Chi-Mo Huang
  • Publication number: 20080309681
    Abstract: A device for driving an LCD panel comprises: a gray level voltage generation circuit, for generating gray level voltages, and determining whether the gray level voltages are generated by utilizing a first set of reference voltages or a second set of reference voltages according to a polarity inversion control signal, where the gray level voltage generation circuit determines whether a gray level voltage is generated by utilizing a maximum of the first set of reference voltages or a maximum of the second set of reference voltages, and determines whether another gray level voltage is generated by utilizing a minimum of the first set of reference voltages or a minimum of the second set of reference voltages; and a source driving circuit, for selecting a gray level voltage according to display data or inverted data of the display data to drive a source of a display cell of the LCD panel.
    Type: Application
    Filed: June 13, 2007
    Publication date: December 18, 2008
    Inventors: Wei-Yang Ou, Jing-Chi Yu, Wen-Chi Wu, Chi-Mo Huang
  • Patent number: 7459953
    Abstract: The present invention discloses a voltage adjusting circuit including a first switch element, a second switch element, a third switch element, a fourth switch element, a fifth switch element, and a sixth switch element. At first, the voltage adjusting circuit performs a discharging operation on an output voltage toward a reference voltage source, and then when the output voltage level is approaching a voltage level of an input voltage source, the voltage adjusting circuit will perform the discharging operation on the output voltage toward the input voltage source instead, and thus the voltage adjusting circuit can avoid affecting the input voltage source when performing the discharging operation. In addition, the voltage adjusting circuit does not need a digital counter to perform the above dual-phase type discharging operation or multi-phase type discharging operation, and therefore cost of the voltage adjusting circuit is lower, and the voltage adjusting circuit has good accuracy.
    Type: Grant
    Filed: August 14, 2007
    Date of Patent: December 2, 2008
    Assignee: ILI Technology Corp.
    Inventors: Meng-Yong Lin, Bo-Chang Wu, Ming-Huang Liu, Chi-Mo Huang
  • Publication number: 20080291192
    Abstract: A charge recycling system of a liquid crystal display includes a controller and at least one switch module. The controller outputs at least one control signal when driving signals of a gate line and a source line of the liquid crystal display are both disabled, and the switch module couples the source line to a voltage supply of a driving circuit of the liquid crystal display according to the control signal. In this way, charges stored in a liquid crystal unit coupled to the source line are recycled to the voltage supply of the driving circuit, therefore raising the utilization efficiency of charges of the liquid crystal display and lowering the power consumed by the liquid crystal display.
    Type: Application
    Filed: August 17, 2007
    Publication date: November 27, 2008
    Inventors: Chen-Hsien Han, Wei-Shan Chiang, Jing-Chi Yu, Meng-Yong Lin, Chi-Mo Huang
  • Patent number: 7449952
    Abstract: An amplifying circuit includes an operational amplifier, a pull-up circuit and a pull-down circuit. The operational amplifier generates a first pull-up signal, a first pull-down signal and an output signal, wherein the phases of the first pull-up signal and the first pull-down signal are out of phase with the output signal. The pull-up circuit includes a first controlling module for outputting a second pull-up signal according to the first pull-up signal, and a first adjusting module for adjusting the output signal according to the second pull-up signal. The pull-down circuit includes a second controlling module for outputting a second pull-down signal according to the first pull-down signal, and a second adjusting module for adjusting the output signal according to the second pull-down signal.
    Type: Grant
    Filed: March 14, 2007
    Date of Patent: November 11, 2008
    Assignee: Ili Technology Corp.
    Inventors: Jing-Chi Yu, Wen-Chi Wu, Hsiu-Ping Lin, Yao-Ching Wang, Chi-Mo Huang
  • Publication number: 20080231364
    Abstract: An amplifying circuit includes an operational amplifier, a pull-up circuit and a pull-down circuit. The operational amplifier generates a first pull-up signal, a first pull-down signal and an output signal, wherein the phases of the first pull-up signal and the first pull-down signal are out of phase with the output signal. The pull-up circuit includes a first controlling module for outputting a second pull-up signal according to the first pull-up signal, and a first adjusting module for adjusting the output signal according to the second pull-up signal. The pull-down circuit includes a second controlling module for outputting a second pull-down signal according to the first pull-down signal, and a second adjusting module for adjusting the output signal according to the second pull-down signal.
    Type: Application
    Filed: March 14, 2007
    Publication date: September 25, 2008
    Inventors: Jing-Chi Yu, Wen-Chi Wu, Hsiu-Ping Lin, Yao-Ching Wang, Chi-Mo Huang
  • Publication number: 20080111645
    Abstract: The present invention relates to an oscillating apparatus. The oscillating apparatus includes a biasing circuit, a multi-vibrator, a detecting circuit, and a selecting circuit. The biasing circuit is for generating a bias signal, wherein the biasing circuit includes a connecting port for using an impedance device to control an oscillating frequency or for directly connecting to external clock source as a reference clock. The multi-vibrator coupled to the biasing circuit for generating the oscillating frequency according to the quantity of the biasing signal. The detecting circuit coupled to the connecting port for generating a detecting signal whether the connecting port is coupled to the impedance device or the external clock source. The selecting circuit includes an AND gate coupled to the multi-vibrator and the selection signal and an OR gate coupled to the AND gate and the connecting port.
    Type: Application
    Filed: October 30, 2006
    Publication date: May 15, 2008
    Inventors: Wen-Chi Wu, Yao-Ching Wang, Chi-Mo Huang
  • Publication number: 20070296499
    Abstract: An amplifier circuit includes an operational amplifier and a compensation circuit. The operational amplifier includes an amplifying stage for amplifying an input signal to generate an amplifying signal; and an output stage coupled to an output node of the amplifying stage for receiving the amplifying signal and generating an output signal according to the amplifying signal. The compensation circuit is coupled to the output stage and the amplifying stage for generating a compensation signal according to the output signal, and feeding the compensation signal back to the output node of the amplifying stage for compensating the amplifying signal.
    Type: Application
    Filed: June 11, 2006
    Publication date: December 27, 2007
    Inventors: Ming-Huang Liu, Kai-Ming Liu, Chen-Hsien Han, Meng-Yong Lin, Sung-En Liu, Chi-Mo Huang
  • Publication number: 20070246740
    Abstract: The invention relates to a layout method for a transistor with improved ESD robustness. The layout method includes defining a ring region from a first conductive type; defining a first and a second rectangular diffusion regions from a second conductive type, wherein the first and second rectangular diffusion regions are isolated from each other; defining a ring diffusion region of the second conductive type between the first and second rectangular diffusion regions; defining a first gate electrode between the first rectangular diffusion region of the second conductive type and the ring diffusion region of the second conductive region; and defining a second gate electrode between the second rectangular diffusion region of the second conductive type and the ring diffusion region of the second conductive type.
    Type: Application
    Filed: April 25, 2006
    Publication date: October 25, 2007
    Inventors: Jing-Chi Yu, Yu-Ju Yang, Chih-His Chen, Chi-Mo Huang