Abstract: An electronic device can include a substrate including a first trench having a first bottom and a first wall. The electrode device can also include a first gate electrode within the first trench and adjacent to the first wall and overlying the first bottom of the first trench, and a second gate electrode within the first trench and adjacent to the first gate electrode and overlying the first bottom of the first trench. The electronic device can further include discontinuous storage elements including a first set of discontinuous storage elements, wherein the first set of the discontinuous storage elements lies between (i) the first gate electrode or the second gate electrode and (ii) the first bottom of the first trench. Processes of forming and using the electronic device are also described.

Abstract: An electronic device can include a substrate including a trench having a bottom and a first wall. The electronic device can also include a first gate electrode within the trench and adjacent to the first wall and overlying the bottom of the trench, a second gate electrode overlying the substrate outside of the trench, and a third gate electrode within the trench and adjacent to the first gate electrode and overlying the bottom of the trench. The electronic device can also include discontinuous storage elements including a first set of discontinuous storage elements, wherein the first set of the discontinuous storage elements lies adjacent to the first wall of the trench. Processes of forming and using the electronic device are also described.

Abstract: An electronic device can include a substrate including a first trench having a first bottom and a first wall. The electrode device can also include a first gate electrode within the first trench and adjacent to the first wall and overlying the first bottom of the first trench, and a second gate electrode within the first trench and adjacent to the first gate electrode and overlying the first bottom of the first trench. The electronic device can further include discontinuous storage elements including a first set of discontinuous storage elements, wherein the first set of the discontinuous storage elements lies between (i) the first gate electrode or the second gate electrode and (ii) the first bottom of the first trench. Processes of forming and using the electronic device are also described.

Abstract: An electronic device can include a substrate including a first trench having a first bottom and a first wall. The electrode device can also include a first gate electrode within the first trench and adjacent to the first wall and overlying the first bottom of the first trench, and a second gate electrode within the first trench and adjacent to the first gate electrode and overlying the first bottom of the first trench. The electronic device can further include discontinuous storage elements including a first set of discontinuous storage elements, wherein the first set of the discontinuous storage elements lies between (i) the first gate electrode or the second gate electrode and (ii) the first bottom of the first trench. Processes of forming and using the electronic device are also described.

Abstract: An electronic device can include a substrate including a fin lying between a first trench and a second trench, wherein the fin is no more than approximately 90 nm wide. The electronic device can also include a first gate electrode within the first trench and adjacent to the fin, and a second gate electrode within the second trench and adjacent to the fin. The electronic device can further include discontinuous storage elements including a first set of discontinuous storage elements and a second set of discontinuous storage elements, wherein the first set of the discontinuous storage elements lies between the first gate electrode and the fin, and the second set of the discontinuous storage elements lies between the second gate electrode and the fin. Processes of forming and using the electronic device are also described.

Abstract: A programmable storage device includes a first diffusion region underlying a portion of a first trench defined in a semiconductor substrate and a second diffusion region occupying an upper portion of the substrate adjacent to the first trench. The device includes a charge storage stack lining sidewalls and a portion of a floor of the first trench. The charge storage stack includes a layer of discontinuous storage elements (DSEs). Electrically conductive spacers formed on opposing sidewalls of the first trench adjacent to respective charge storage stacks serve as control gates for the device. The DSEs may be silicon, polysilicon, metal, silicon nitride, or metal nitride nanocrystals or nanoclusters. The storage stack includes a top dielectric of CVD silicon oxide overlying the nanocrystals overlying a bottom dielectric of thermally formed silicon dioxide. The device includes first and second injection regions in the layer of DSEs proximal to the first and second diffusion regions.

Abstract: An electronic device can include a substrate including a fin lying between a first trench and a second trench, wherein the fin is no more than approximately 90 nm wide. The electronic device can also include a first gate electrode within the first trench and adjacent to the fin, and a second gate electrode within the second trench and adjacent to the fin. The electronic device can further include discontinuous storage elements including a first set of discontinuous storage elements and a second set of discontinuous storage elements, wherein the first set of the discontinuous storage elements lies between the first gate electrode and the fin, and the second set of the discontinuous storage elements lies between the second gate electrode and the fin. Processes of forming and using the electronic device are also described.

Abstract: An electronic device can include a substrate including a trench having a bottom and a first wall. The electronic device can also include a first gate electrode within the trench and adjacent to the first wall and overlying the bottom of the trench, a second gate electrode overlying the substrate outside of the trench, and a third gate electrode within the trench and adjacent to the first gate electrode and overlying the bottom of the trench. The electronic device can also include discontinuous storage elements including a first set of discontinuous storage elements, wherein the first set of the discontinuous storage elements lies adjacent to the first wall of the trench. Processes of forming and using the electronic device are also described.

Abstract: An electronic device can include a substrate including a first trench having a first bottom and a first wall. The electrode device can also include a first gate electrode within the first trench and adjacent to the first wall and overlying the first bottom of the first trench, and a second gate electrode within the first trench and adjacent to the first gate electrode and overlying the first bottom of the first trench. The electronic device can further include discontinuous storage elements including a first set of discontinuous storage elements, wherein the first set of the discontinuous storage elements lies between (i) the first gate electrode or the second gate electrode and (ii) the first bottom of the first trench. Processes of forming and using the electronic device are also described.

Abstract: A method for forming a semiconductor device includes providing a semiconductor substrate comprising silicon, forming a layer of dielectric on the surface of the semiconductor substrate, forming a gate electrode comprising silicon over the layer of dielectric, recessing the layer of dielectric under the gate electrode, filling the recess with a discrete charge storage material, oxidizing a portion of the gate electrode, and oxidizing a portion of the semiconductor substrate.

Abstract: A method for forming a portion of a semiconductor device includes: patterning gate stack layers overlying a substrate into a gate stack; implanting dopant ions to form shallow source/drain extension implant regions in the substrate adjacent to the gate stack; oxidizing the gate stack at first oxidation conditions to form an oxidation layer on sidewalls of the gate stack; and oxidizing the gate stack at second oxidation conditions to form further oxidation of the oxidation layer on sidewalls of the gate stack. The second oxidation conditions are different from the first oxidation conditions.

Abstract: A programmable storage device includes a first diffusion region underlying a portion of a first trench defined in a semiconductor substrate and a second diffusion region occupying an upper portion of the substrate adjacent to the first trench. The device includes a charge storage stack lining sidewalls and a portion of a floor of the first trench. The charge storage stack includes a layer of discontinuous storage elements (DSEs). Electrically conductive spacers formed on opposing sidewalls of the first trench adjacent to respective charge storage stacks serve as control gates for the device. The DSEs may be silicon, polysilicon, metal, silicon nitride, or metal nitride nanocrystals or nanoclusters. The storage stack includes a top dielectric of CVD silicon oxide overlying the nanocrystals overlying a bottom dielectric of thermally formed silicon dioxide. The device includes first and second injection regions in the layer of DSEs proximal to the first and second diffusion regions.

Abstract: A memory and a method for programming a memory device are discussed. The method comprises selecting a cell to program, wherein the cell is coupled to a bit line, applying a first programming pulse, wherein the first programming pulse comprises applying a first voltage to the bit line, verifying if the cell is programmed after applying the first programming pulse, and applying a second programming pulse to the bit line after applying the first programming pulse if the cell is not programmed after applying the first programming pulse, wherein second programming pulse comprises applying a second voltage to the bit line, wherein the second voltage is different than the first voltage.

Abstract: A programmable storage device includes a first diffusion region underlying a portion of a first trench defined in a semiconductor substrate and a second diffusion region occupying an upper portion of the substrate adjacent to the first trench. The device includes a charge storage stack lining sidewalls and a portion of a floor of the first trench. The charge storage stack includes a layer of discontinuous storage elements (DSEs). Electrically conductive spacers formed on opposing sidewalls of the first trench adjacent to respective charge storage stacks serve as control gates for the device. The DSEs may be silicon, polysilicon, metal, silicon nitride, or metal nitride nanocrystals or nanoclusters. The storage stack includes a top dielectric of CVD silicon oxide overlying the nanocrystals overlying a bottom dielectric of thermally formed silicon dioxide. The device includes first and second injection regions in the layer of DSEs proximal to the first and second diffusion regions.

Abstract: Floating gates are formed in two separate polysilicon depositions steps resulting in distinct portions. The first formed portions are between isolation regions. A thick insulator is formed over the isolation regions and floating gate portions. The thick insulator is patterned to leave fences over the isolation regions. A thinning process, an isotropic etch in this example, is applied to these fences to make them thinner. Polysilicon sidewall spacers are formed on the sides of these fences. These sidewall spacers become the second portion of the floating gate. These second portions have the desired shape for significantly increasing the capacitance to the subsequently formed control gates, thereby reducing the gate voltage required for programming and erasing made by a relatively robust process.