Patents by Inventor Chi Pin Hung

Chi Pin Hung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240113061
    Abstract: An electronic device package includes a circuit layer, a first semiconductor die, a second semiconductor die, a plurality of first conductive structures and a second conductive structure. The first semiconductor die is disposed on the circuit layer. The second semiconductor die is disposed on the first semiconductor die, and has an active surface toward the circuit layer. The first conductive structures are disposed between a first region of the second semiconductor die and the first semiconductor die, and electrically connecting the first semiconductor die to the second semiconductor die. The second conductive structure is disposed between a second region of the second semiconductor die and the circuit layer, and electrically connecting the circuit layer to the second semiconductor die.
    Type: Application
    Filed: December 5, 2023
    Publication date: April 4, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Mei-Ju LU, Chi-Han CHEN, Chang-Yu LIN, Jr-Wei LIN, Chih-Pin HUNG
  • Publication number: 20040124541
    Abstract: A flip chip package mainly includes a semiconductor chip disposed in a recessed cavity defined in an upper surface of a substrate by flip chip bonding. The lower surface of the substrate is provided with a reinforcement-containing insulating layer thereby enhancing mechanical strength thereof. The upper surface of the substrate is provided with a plurality of solder pads formed at the periphery of the recessed cavity for making external electrical connections. The substrate includes a plurality of chip contact pads provided on the surface of the reinforcement-containing insulating layer and exposed from the recessed cavity wherein the chip contact pads are electrically connected to the solder pads through a plurality of conductive traces.
    Type: Application
    Filed: October 8, 2003
    Publication date: July 1, 2004
    Inventors: Sung Mao Wu, Hsueh Te Wang, Chi Pin Hung