Abstract: A semiconductor device includes: a first semiconductor structure; a second semiconductor structure on the first semiconductor structure; an active region between the first semiconductor structure and the second semiconductor structure, wherein the active region comprises a well layer and a barrier layer, wherein the barrier layer has a band gap; a first electron blocking layer between the second semiconductor structure and the active region, wherein the first electron blocking layer comprises a band gap which is greater than the band gap of the barrier layer; a first aluminum-containing layer between the first electron blocking layer and the active region, wherein the first aluminum-containing layer has a band gap greater than the band gap of the first electron blocking layer; a confinement layer between the first aluminum-containing layer and the active region; and a second aluminum-containing layer between the second semiconductor structure and the first electron blocking layer; wherein both the first alumi

Abstract: A semiconductor device comprises: a first semiconductor structure; a second semiconductor structure on the first semiconductor structure; an active region between the first semiconductor structure and the second semiconductor structure, wherein the active region comprises multiple alternating well layers and first barrier layers, wherein each of the first barrier layers has a band gap, the active region further comprises an upper surface facing the second semiconductor structure and a bottom surface opposite the upper surface; a first electron blocking layer between the second semiconductor structure and the active region, wherein the first electron blocking layer having a band gap greater than the band gap of one of the first barrier layers; a first aluminum-containing layer between the first electron blocking layer and the active region, wherein the first aluminum-containing layer has a first thickness and a band gap greater than the band gap of the first electron blocking layer; and a second aluminum-conta

Abstract: A light emitting diode includes an epitaxial semiconductor layer including an N-type nitride layer, a v-pit emergence layer, a strain adjustment layer, an active layer, and a P-type nitride layer that are sequentially stacked in that order. The active layer has a plurality of barrier layers and a plurality of well layers that are alternatively stacked. The epitaxial semiconductor layer includes a v-pit. The v-pit has an opening that is located at a topmost one of the barrier layers of the active layer, and has a width that is greater than 260 nm. The v-pit emergence layer is doped with carbon (C) at a doping concentration that is no less than 7×1016/cm3. A light emitting device includes the light emitting diode.

Abstract: A semiconductor device includes: a first semiconductor structure; a second semiconductor structure on the first semiconductor structure; an active region between the first semiconductor structure and the second semiconductor structure, wherein the active region comprises a well layer and a barrier layer, wherein the barrier layer has a band gap; a first electron blocking layer between the second semiconductor structure and the active region, wherein the first electron blocking layer comprises a band gap which is greater than the band gap of the barrier layer; a first aluminum-containing layer between the first electron blocking layer and the active region, wherein the first aluminum-containing layer has a band gap greater than the band gap of the first electron blocking layer; a confinement layer between the first aluminum-containing layer and the active region; and a second aluminum-containing layer between the second semiconductor structure and the first electron blocking layer; wherein both the first alumi

Abstract: A semiconductor device includes: a first semiconductor structure; a second semiconductor structure on the first semiconductor structure; an active region between the first semiconductor structure and the second semiconductor structure, wherein the active region includes multiple alternating well layers and barrier layers, wherein each of the barrier layers has a band gap, the active region further includes an upper surface facing the second semiconductor structure and a bottom surface opposite the upper surface; an electron blocking region between the second semiconductor structure and the active region, wherein the electron blocking region includes a band gap, and the band gap of the electron blocking region is greater than the band gap of one of the barrier layers; a first aluminum-containing layer between the electron blocking region and the active region, wherein the first aluminum-containing layer has a band gap greater than the band gap of the electron blocking region; a confinement layer between the fi

Abstract: A semiconductor device comprises: a first semiconductor structure; a second semiconductor structure on the first semiconductor structure; an active region between the first semiconductor structure and the second semiconductor structure, wherein the active region comprises multiple alternating well layers and first barrier layers, wherein each of the first barrier layers has a band gap, the active region further comprises an upper surface facing the second semiconductor structure and a bottom surface opposite the upper surface; a first electron blocking layer between the second semiconductor structure and the active region, wherein the first electron blocking layer having a band gap greater than the band gap of one of the first barrier layers; a first aluminum-containing layer between the first electron blocking layer and the active region, wherein the first aluminum-containing layer has a first thickness and a band gap greater than the band gap of the first electron blocking layer; and a second aluminum-conta

Abstract: A semiconductor device comprises: a first semiconductor structure; a second semiconductor structure on the first semiconductor structure; an active region, wherein the active region comprises multiple alternating well layers and barrier layers, the active region further comprises an upper surface facing the second semiconductor structure and a bottom surface opposite the upper surface; an electron blocking region between the second semiconductor structure and the active region; a first aluminum-containing layer between the electron blocking region and the active region, wherein the first aluminum-containing layer has a band gap greater than the band gap of the first electron blocking layer; and a p-type dopant above the bottom surface of the active region and comprising a concentration profile comprising a peak shape having a peak concentration value, wherein the peak concentration value lies at a distance of between 15 nm and 60 nm from the upper surface of the active region.

Abstract: A semiconductor device includes: a first semiconductor structure; a second semiconductor structure on the first semiconductor structure; an active region between the first semiconductor structure and the second semiconductor structure, wherein the active region includes multiple alternating well layers and barrier layers, wherein each of the barrier layers has a band gap, the active region further includes an upper surface facing the second semiconductor structure and a bottom surface opposite the upper surface; an electron blocking region between the second semiconductor structure and the active region, wherein the electron blocking region includes a band gap, and the band gap of the electron blocking region is greater than the band gap of one of the barrier layers; a first aluminum-containing layer between the electron blocking region and the active region, wherein the first aluminum-containing layer has a band gap greater than the band gap of the electron blocking region; a confinement layer between the fi

Abstract: A semiconductor device comprises: a first semiconductor structure; a second semiconductor structure on the first semiconductor structure; an active region, wherein the active region comprises multiple alternating well layers and barrier layers, the active region further comprises an upper surface facing the second semiconductor structure and a bottom surface opposite the upper surface; an electron blocking region between the second semiconductor structure and the active region; a first aluminum-containing layer between the electron blocking region and the active region, wherein the first aluminum-containing layer has a band gap greater than the band gap of the first electron blocking layer; and a p-type dopant above the bottom surface of the active region and comprising a concentration profile comprising a peak shape having a peak concentration value, wherein the peak concentration value lies at a distance of between 15 nm and 60 nm from the upper surface of the active region.

Abstract: A semiconductor device comprises: a first semiconductor structure; a second semiconductor structure on the first semiconductor structure; an active region, wherein the active region comprises multiple alternating well layers and barrier layers, the active region further comprises an upper surface facing the second semiconductor structure and a bottom surface opposite the upper surface; an electron blocking region between the second semiconductor structure and the active region; a first aluminum-containing layer between the electron blocking region and the active region, wherein the first aluminum-containing layer has a band gap greater than the band gap of the first electron blocking layer; and a p-type dopant above the bottom surface of the active region and comprising a concentration profile comprising a peak shape having a peak concentration value, wherein the peak concentration value lies at a distance of between 15 nm and 60 nm from the upper surface of the active region.

Abstract: A semiconductor device comprises: a first semiconductor structure; a second semiconductor structure on the first semiconductor structure; an active region, wherein the active region comprises multiple alternating well layers and barrier layers, the active region further comprises an upper surface facing the second semiconductor structure and a bottom surface opposite the upper surface; an electron blocking region between the second semiconductor structure and the active region; a first aluminum-containing layer between the electron blocking region and the active region, wherein the first aluminum-containing layer has a band gap greater than the band gap of the first electron blocking layer; and a p-type dopant above the bottom surface of the active region and comprising a concentration profile comprising a peak shape having a peak concentration value, wherein the peak concentration value lies at a distance of between 15 nm and 60 nm from the upper surface of the active region.

Abstract: A semiconductor device comprises: a first semiconductor structure; a second semiconductor structure on the first semiconductor structure; an active region, wherein the active region comprises multiple alternating well layers and barrier layers, the active region further comprises an upper surface facing the second semiconductor structure and a bottom surface opposite the upper surface; an electron blocking region between the second semiconductor structure and the active region; a first aluminum-containing layer between the electron blocking region and the active region, wherein the first aluminum-containing layer has a band gap greater than the band gap of the first electron blocking layer; and a p-type dopant above the bottom surface of the active region and comprising a concentration profile comprising a peak shape having a peak concentration value, wherein the peak concentration value lies at a distance of between 15 nm and 60 nm from the upper surface of the active region.

Abstract: A semiconductor device comprises: a first semiconductor structure; a second semiconductor structure on the first semiconductor structure; an active region, wherein the active region comprises multiple alternating well layers and barrier layers, the active region further comprises an upper surface facing the second semiconductor structure and a bottom surface opposite the upper surface; an electron blocking region between the second semiconductor structure and the active region; a first aluminum-containing layer between the electron blocking region and the active region, wherein the first aluminum-containing layer has a band gap greater than the band gap of the first electron blocking layer; and a p-type dopant above the bottom surface of the active region and comprising a concentration profile comprising a peak shape having a peak concentration value, wherein the peak concentration value lies at a distance of between 15 nm and 60 nm from the upper surface of the active region.

Abstract: A wafer carrier comprises a supporting body having an opening therein, wherein said opening in said supporting body has a concave sidewall and a bottom surface in said supporting body which is curved in cross section; a plurality of vertical supporting rods configured to support and contact a wafer received in said opening and to displace said wafer from the bottom surface of the opening in said supporting body; wherein one of said supporting rods has an end for contacting and supporting said wafer; and wherein when viewing from a top view of the wafer carrier, one of said supporting rods has a base lining on the concave sidewall of said opening in said supporting body, a first concave side opposite to the base and two second concave sides connecting the base and the first concave side.

Abstract: A method of monitoring a status of one or more computing devices in a computing system environment includes deploying a sensor network including a plurality of sensors to monitor multiple operating parameters of one or more computing devices of said computing system environment, each sensor being associated with one of said one or more computing devices. A base station computing device collects operating parameter data for the computing devices and analyzes the operating parameter data to (a) predict a failure of said one or more computing devices and/or (b) identify a fault condition of said one or more computing devices. Computing device operating parameters monitored include one or more of an operating temperature, a vibration, a cooling air flow rate, and a battery charge level. Monitoring systems for use in the method are disclosed.

Abstract: A wafer carrier comprises a supporting body having a height and comprising an opening, wherein a bottom surface of the opening is a curved surface; and a plurality of supporting rods formed around a periphery of the supporting body. Another aspect of the present application provides a manufacturing method of the wafer carrier. The method comprises forming an epitaxial layer on a growth substrate to form a wafer structure; measuring a curvature radius of the wafer structure; and providing the wafer carrier described above in accordance with the curvature radius of the wafer structure.