Abstract: A liquid crystal display power saving method is disclosed. It includes steps of: (a) dividing output channels coupled to a panel into multiple sets and each set includes M output channels, M is a positive integer; (b) calculating an average of the (N?1)-th display line of the panel after charge sharing, N is a positive integer larger than 1; (c) determining whether each of M output channels consumes power when it transmits a data signal from the (N?1)-th display line to the N-th display line; (d) calculating total power consumption of transmitting the data signal from the (N?1)-th display line to the N-th display line under possible charge sharing methods among the M output channels; (e) selecting a lowest power consumption charge sharing method from the possible charge sharing methods; and (f) switching coupling relationships among the M output channels according to the lowest power consumption charge sharing method.

Abstract: A liquid crystal display power saving method includes steps of: (a) setting the architecture of output channels of a source driver; (b) setting charge sharing average registers; (c) selecting whether the data signals are reversed; (d) calculating an average of the (N-1)-th display line of the panel after charge-sharing, N is a positive integer larger than 1; (e) determining whether each of M output channels consumes power when it transmits data signal from the (N-1)-th display line to the N-th display line; (f) calculating a total power consumption of transmitting the data signal from the (N-1)-th display line to the N-th display line under possible charge-sharing modes among the M output channels; (g) selecting a lowest power consumption charge-sharing mode from the possible charge-sharing modes; (h) controlling the operation of the source driver according to the lowest power charge-sharing mode.

Abstract: A liquid crystal display power saving method is disclosed. It includes steps of: (a) dividing output channels coupled to a panel into multiple sets and each set includes M output channels, M is a positive integer; (b) calculating an average of the (N?1)-th display line of the panel after charge sharing, N is a positive integer larger than 1; (c) determining whether each of M output channels consumes power when it transmits a data signal from the (N?1)-th display line to the N-th display line; (d) calculating total power consumption of transmitting the data signal from the (N?1)-th display line to the N-th display line under possible charge sharing methods among the M output channels; (e) selecting a lowest power consumption charge sharing method from the possible charge sharing methods; and (f) switching coupling relationships among the M output channels according to the lowest power consumption charge sharing method.

Abstract: A driving chip set includes a master chip and at least one slave chip. In the master chip, a master receiving terminal receives a data signal through a first data transmission interface; a processing unit generates a first partial data signal and a second partial data signal according to the data signal; a master buffer registers the first partial data signal; a master output terminal outputs the second partial data signal through a second data transmission interface. In the slave chip, a slave receiving terminal receives the second partial data signal through the second data transmission interface and it is registered by a slave buffer. The processing unit controls a master driver and a slave driver to output the first partial data signal and second partial data signal to a display panel. The display panel displays an image according to the first partial data signal and second partial data signal.

Abstract: A driving chip set includes a master chip and at least one slave chip. In the master chip, a master receiving terminal receives a data signal through a first data transmission interface; a processing unit generates a first partial data signal and a second partial data signal according to the data signal; a master buffer registers the first partial data signal; a master output terminal outputs the second partial data signal through a second data transmission interface. In the slave chip, a slave receiving terminal receives the second partial data signal through the second data transmission interface and it is registered by a slave buffer. The processing unit controls a master driver and a slave driver to output the first partial data signal and second partial data signal to a display panel. The display panel displays an image according to the first partial data signal and second partial data signal.