Patents by Inventor Chi-Tung Yeh

Chi-Tung Yeh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9147668
    Abstract: A method for fabricating a semiconductor structure is disclosed. First, an interposer is disposed on a carrier. The carrier has a base body and a bonding layer bonded to the base body. The interposer has opposite first and second sides and the first side has a plurality of conductive elements. The interposer is disposed on the carrier with the first side bonded to the bonding layer and the conductive elements embedded in the bonding layer. Then, at least a semiconductor element is disposed on the second side of the interposer. As such, the semiconductor element and the interposer form a semiconductor structure. Since the conductive elements are embedded in the bonding layer instead of the base body, the present invention eliminates the need to form concave portions in the base body for receiving the conductive elements. Therefore, the method of the present invention is applicable to interposers of different specifications.
    Type: Grant
    Filed: November 7, 2013
    Date of Patent: September 29, 2015
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Chi-Tung Yeh, Chun-Tang Lin
  • Publication number: 20150064850
    Abstract: A method for fabricating a semiconductor structure is disclosed. First, an interposer is disposed on a carrier. The carrier has a base body and a bonding layer bonded to the base body. The interposer has opposite first and second sides and the first side has a plurality of conductive elements. The interposer is disposed on the carrier with the first side bonded to the bonding layer and the conductive elements embedded in the bonding layer. Then, at least a semiconductor element is disposed on the second side of the interposer. As such, the semiconductor element and the interposer form a semiconductor structure. Since the conductive elements are embedded in the bonding layer instead of the base body, the present invention eliminates the need to form concave portions in the base body for receiving the conductive elements. Therefore, the method of the present invention is applicable to interposers of different specifications.
    Type: Application
    Filed: November 7, 2013
    Publication date: March 5, 2015
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Chi-Tung Yeh, Chun-Tang Lin
  • Publication number: 20140191386
    Abstract: A semiconductor package is provided. The semiconductor package includes a substrate; a semiconductor element having opposite active and inactive surfaces and disposed on the substrate via the active surface thereof, wherein the inactive surface of the semiconductor element is roughened; a thermally conductive layer bonded to the inactive surface of the semiconductor element; and a heat sink disposed on the thermally conductive layer. The roughened inactive surface facilitates the bonding between the semiconductor element and the thermally conductive layer so as to eliminate the need to perform a gold coating process and the use of a flux and consequently reduce the formation of voids in the thermally conductive layer.
    Type: Application
    Filed: May 15, 2013
    Publication date: July 10, 2014
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Mei-Chin Lee, Wang-Ting Chen, Chi-Tung Yeh, Chun-Tang Lin, Yi-Che Lai