Patents by Inventor Chi-Wei Chiang

Chi-Wei Chiang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240136420
    Abstract: A thin film transistor includes a substrate, a semiconductor layer, a gate insulating layer, a gate, a source and a drain. The semiconductor layer is located above the substrate. The gate insulating layer is located above the semiconductor layer. The gate is located above the gate insulating layer and overlapping with the semiconductor layer. The gate includes a first portion, a second portion and a third portion. The first portion is extending along the surface of the gate insulating layer and directly in contact with the gate insulating layer. The second portion is separated from the gate insulating layer. Taking the surface of the gate insulating layer as a reference, the top surface of the second portion is higher than the top surface of the first portion. The third portion connects the first portion to the second portion. The source and the drain are electrically connected to the semiconductor layer.
    Type: Application
    Filed: December 1, 2022
    Publication date: April 25, 2024
    Applicant: AUO Corporation
    Inventors: Kuo-Jui Chang, Wen-Tai Chen, Chi-Sheng Chiang, Yu-Chuan Liao, Chien-Sen Weng, Ming-Wei Sun
  • Publication number: 20240107736
    Abstract: An IC structure and a method of forming the same are provided. In an embodiment, an exemplary method of forming the IC structure forming a first semiconductor fin and a second semiconductor fin protruding from a substrate, forming a high-k metal gate (HKMG) structure over the first semiconductor fin and the second semiconductor fin, forming a trench to separate the HKMG structure into two portions, conformally depositing a first dielectric layer in the trench, depositing a second dielectric layer over the first dielectric layer to fill the trench, wherein the second dielectric layer includes nitrogen, and the first dielectric layer is free of nitrogen, and planarizing the first dielectric layer and second dielectric layer to form a gate isolation structure in the trench.
    Type: Application
    Filed: March 9, 2023
    Publication date: March 28, 2024
    Inventors: Chi-Wei Wu, Hsin-Che Chiang, Jeng-Ya Yeh
  • Publication number: 20240071829
    Abstract: A method for forming a semiconductor structure is provided. The method for forming the semiconductor structure includes forming first fin structures and a second fin structures over a substrate, forming a first gate stack and a second gate stack that extend in a first direction across the first fin structures and the second fin structures, respectively, and etching the first gate stack and the second gate stack to form a first trench through the first gate stack and a second trench through the second gate stack. A first dimension of the first trench in the first direction is greater than a second dimension of the second trench in the first direction. The method further includes forming a first gate cutting structure and a second gate cutting structure in the first trench and the second trench, respectively.
    Type: Application
    Filed: August 26, 2022
    Publication date: February 29, 2024
    Inventors: Chi-Wei WU, Hsin-Che CHIANG, Jeng-Ya YEH
  • Patent number: 10533962
    Abstract: The present invention provides a gas sensor structure comprising a gas sensing chip. The back of the sensing material is a hollow structure. An insulating layer is below the sensing material. A micro heating is disposed surrounding the sensing material. The sensing material adheres to sensing electrodes. The sensing material is a complex structure including a metal oxide semiconductor and a roughened lanthanum-carbonate gas sensing layer. The thickness of the metal oxide semiconductor is between 0.2 ?m and 10 ?m; the thickness of the roughened lanthanum-carbonate gas sensing layer is between 0.1 ?m and 4 ?m; and the size of the back etching holes is smaller than 1*1 mm. By using the gas sensor structure according to the present invention, a suspended gas sensing structure can be fabricated on a silicon substrate and the chip size can be minimized.
    Type: Grant
    Filed: December 6, 2016
    Date of Patent: January 14, 2020
    Assignee: National Applied Research Laboratories
    Inventors: Yu-Jen Hsiao, Ting-Jen Hsueh, Yu-Te Lin, Yen-Hsi Li, Jia-Min Shieh, Chien-Wei Liu, Chi-Wei Chiang
  • Publication number: 20190238792
    Abstract: The present disclosure provides a conversion device, a connection conference system and a connection conference method. This method includes steps as follows. A computer device executes video telephony software. A conference host establishes audio and video communications with a user device through network. The conference connection host receives a first audio signal and a first video signal outputted from the user device. The first audio signal and the first video signal are converted into a first converted audio signal and a first converted video signal supported by the video telephony software, and then the first converted audio signal and the first converted video signal are transmitted to the computer device.
    Type: Application
    Filed: October 21, 2018
    Publication date: August 1, 2019
    Inventors: Ming-Kang CHUANG, Chi-Wei CHIANG
  • Publication number: 20180038816
    Abstract: The present invention provides a gas sensor structure comprising a gas sensing chip. The back of the sensing material is a hollow structure. An insulating layer is below the sensing material. A micro heating is disposed surrounding the sensing material. The sensing material adheres to sensing electrodes. The sensing material is a complex structure including a metal oxide semiconductor and a roughened lanthanum-carbonate gas sensing layer. The thickness of the metal oxide semiconductor is between 0.2 ?m and 10 ?m; the thickness of the roughened lanthanum-carbonate gas sensing layer is between 0.1 ?m and 4 ?m; and the size of the back etching holes is smaller than 1*1 mm. By using the gas sensor structure according to the present invention, a suspended gas sensing structure can be fabricated on a silicon substrate and the chip size can be minimized.
    Type: Application
    Filed: December 6, 2016
    Publication date: February 8, 2018
    Inventors: YU-JEN HSIAO, TING-JEN HSUEH, YU-TE LIN, YEN-HSI LI, JIA-MIN SHIEH, CHIEN-WEI LIU, CHI-WEI CHIANG
  • Patent number: 7568099
    Abstract: A method for avoiding IKE process conflict includes the steps in that a first gateway sends a first IKE request packet and receives a second IKE request packet from a second gateway. Afterward a decision is performed to decide whether the first gateway is an initiator or a responder. If the first gateway is an initiator, the first gateway will drop the received second IKE request packets and continue working as an initiator. If the first gateway is a responder, then first gateway will cancel the pre-sent first IKE request packet and work as a responder, and will perform IKE negotiation according to the second IKE packet. The present invention also discloses an apparatus for realizing above method.
    Type: Grant
    Filed: March 25, 2005
    Date of Patent: July 28, 2009
    Assignee: Zyxel Communications Corporation
    Inventors: Chia-Yuan Chen, Chi-Wei Chiang
  • Publication number: 20060215674
    Abstract: A method for avoiding IKE process conflict includes the steps in that a first gateway sends a first IKE request packet and receives a second IKE request packet from a second gateway. Afterward a decision is performed to decide whether the first gateway is an initiator or a responder. If the first gateway is an initiator, the first gateway will drop the received second IKE request packets and continue working as an initiator. If the first gateway is a responder, then first gateway will cancel the pre-sent first IKE request packet and work as a responder, and will perform IKE negotiation according to the second IKE packet. The present invention also discloses an apparatus for realizing above method.
    Type: Application
    Filed: March 25, 2005
    Publication date: September 28, 2006
    Inventors: Chia-Yuan Chen, Chi-Wei Chiang