Patents by Inventor Chi-Wei Chung

Chi-Wei Chung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070281853
    Abstract: This invention is to introduce a manufacturing method of fuel cell with integration of catalytic layer and micro sensors, which comprises following steps: manufacturing multi-hole silicon layer step, generating catalytic layer step, forming insulation layer step, integrating micro sensors step, and finalizing step. With the function of gas-diffusion layer in the multi-hole silicon wafer and multiple catalytic grains evenly spread over the inner walls of flow-way holes of the silicon wafer, a great catalytic layer can be formed effectively. Further, micro sensors properly are integrated. This invention's merits include simple structure and capabilities of simultaneously detecting temperature and humidity. Plus, it can heat up internally for a fuel cell.
    Type: Application
    Filed: June 1, 2007
    Publication date: December 6, 2007
    Inventors: Chi-Yuan Lee, Shuo-Jen Lee, Chi-Wei Chung, Chi-Lei Hsieh, Guan-Wei Wu, Yu-Ming Lee
  • Patent number: 6946397
    Abstract: An oxide polishing process that is part of a CMP process flow is disclosed. After a copper layer is polished at a first polishing station and a diffusion barrier layer is polished at a second polishing station, a key sequence at a third polish station is the application of a first oxide slurry and a first DI water rinse followed by a second oxide slurry and then a second DI water rinse. As a result, defect counts are reduced from several thousand to less than 100. Another important factor is a low down force that enables more efficient particle removal. The improved oxide polishing process has the same throughput as a single oxide polish and a DI water rinse method and may be implemented in any three slurry copper CMP process flow.
    Type: Grant
    Filed: November 17, 2003
    Date of Patent: September 20, 2005
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: William Hong, Chia-Che Chung, Chi-Wei Chung, Wen-Chih Chiou, Ying-Ho Chen, Syun-Ming Jang
  • Publication number: 20050106872
    Abstract: An oxide polishing process that is part of a CMP process flow is disclosed. After a copper layer is polished at a first polishing station and a diffusion barrier layer is polished at a second polishing station, a key sequence at a third polish station is the application of a first oxide slurry and a first DI water rinse followed by a second oxide slurry and then a second DI water rinse. As a result, defect counts are reduced from several thousand to less than 100. Another important factor is a low down force that enables more efficient particle removal. The improved oxide polishing process has the same throughput as a single oxide polish and a DI water rinse method and may be implemented in any three slurry copper CMP process flow.
    Type: Application
    Filed: November 17, 2003
    Publication date: May 19, 2005
    Inventors: William Hong, Chia-Che Chuang, Chi-Wei Chung, Wen-Chih Chiou, Ying-Ho Chen, Syun-Ming Jang
  • Publication number: 20040137740
    Abstract: A new method of Chemical Mechanical Polishing of copper surfaces. During the process of CMP and at predetermined instances within the process of CMP, Surface Active Agents of different concentrations are added as a polishing agent of the copper surface that is being polished.
    Type: Application
    Filed: January 15, 2003
    Publication date: July 15, 2004
    Applicant: Taiwan Semiconductor Manufacturing Company
    Inventors: Chi-Wei Chung, Ying-Ho Chen, Syun-Ming Jang, Tsu Shih
  • Patent number: 6686284
    Abstract: A chemical mechanical polishing apparatus that is equipped with a chilled retaining ring and a method for using the apparatus are described. The retaining ring is mounted therein a heat transfer means such as a metal tube and flowing therethrough a heat exchanging fluid for carrying away heat from the wafer mounted in the retaining ring, resulting in a temperature reduction in the slurry solution that contacts the wafer. The present invention apparatus and method therefore reduces the delamination problem for low k dielectric materials during polishing and the wafer scratching problem.
    Type: Grant
    Filed: February 6, 2002
    Date of Patent: February 3, 2004
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd
    Inventors: Chi-Wei Chung, Tung-Ching Tseng, Tsu Shih, Syun-Ming Jang
  • Publication number: 20030211814
    Abstract: A method for removing a metal oxide overlayer over a target polishing surface in conjunction with a chemical mechanical polishing (CMP) process to improve polishing uniformity including providing a substrate target polishing surface having a layer of an oxide of a metal overlying said metal to be chemically mechanically polished; removing the layer of an oxide of the metal using an oxide removal solution prior to performing a CMP process with an abrasive slurry; and, polishing the target polishing surface according to an a CMP process with an abrasive slurry including at least one of an oxidizer and a complexing agent.
    Type: Application
    Filed: May 7, 2002
    Publication date: November 13, 2003
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Tsu Shih, Shen-Nan Lee, Syun-Ming Jang, Chi-Wei Chung
  • Publication number: 20030148615
    Abstract: A chemical mechanical polishing apparatus that is equipped with a chilled retaining ring and a method for using the apparatus are described. The retaining ring is mounted therein a heat transfer means such as a metal tube and flowing therethrough a heat exchanging fluid for carrying away heat from the wafer mounted in the retaining ring, resulting in a temperature reduction in the slurry solution that contacts the wafer. The present invention apparatus and method therefore reduces the delamination problem for low k dielectric materials during polishing and the wafer scratching problem.
    Type: Application
    Filed: February 6, 2002
    Publication date: August 7, 2003
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chi-Wei Chung, Tung-Ching Tseng, Tsu Shih, Syun-Ming Jang