Patents by Inventor Chi-Wei Hsu

Chi-Wei Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11961897
    Abstract: A first fin structure is disposed over a substrate. The first fin structure contains a semiconductor material. A gate dielectric layer is disposed over upper and side surfaces of the first fin structure. A gate electrode layer is formed over the gate dielectric layer. A second fin structure is disposed over the substrate. The second fin structure is physically separated from the first fin structure and contains a ferroelectric material. The second fin structure is electrically coupled to the gate electrode layer.
    Type: Grant
    Filed: January 10, 2022
    Date of Patent: April 16, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chi-Hsing Hsu, Sai-Hooi Yeong, Ching-Wei Tsai, Kuan-Lun Cheng, Chih-Hao Wang, Min Cao
  • Publication number: 20240113119
    Abstract: The present disclosure describes a method for the formation of gate-all-around nano-sheet FETs with tunable performance. The method includes disposing a first and a second vertical structure with different widths over a substrate, where the first and the second vertical structures have a top portion comprising a multilayer nano-sheet stack with alternating first and second nano-sheet layers. The method also includes disposing a sacrificial gate structure over the top portion of the first and second vertical structures; depositing an isolation layer over the first and second vertical structures so that the isolation layer surrounds a sidewall of the sacrificial gate structure; etching the sacrificial gate structure to expose each multilayer nano-sheet stack from the first and second vertical structures; removing the second nano-sheet layers from each exposed multilayer nano-sheet stack to form suspended first nano-sheet layers; forming a metal gate structure to surround the suspended first nano-sheet layers.
    Type: Application
    Filed: December 1, 2023
    Publication date: April 4, 2024
    Inventors: Tetsu Ohtou, Ching-Wei Tsai, Jiun-Jia Huang, Kuan-Lun Cheng, Chi-Hsing Hsu
  • Publication number: 20240071767
    Abstract: A method includes removing a dummy gate stack to form a trench between gate spacers, depositing a gate dielectric extending into the trench, and performing a first treatment process on the gate dielectric. The first treatment process is performed using a fluorine-containing gas. A first drive-in process is then performed to drive fluorine in the fluorine-containing gas into the gate dielectric. The method further includes performing a second treatment process on the gate dielectric, wherein the second treatment process is performed using the fluorine-containing gas, and performing a second drive-in process to drive fluorine in the fluorine-containing gas into the gate dielectric. After the second drive-in process, conductive layers are formed to fill the trench.
    Type: Application
    Filed: January 6, 2023
    Publication date: February 29, 2024
    Inventors: Hsueh-Ju Chen, Chi On Chui, Tsung-Da Lin, Pei Ying Lai, Chia-Wei Hsu
  • Patent number: 11915979
    Abstract: A method includes depositing a high-k gate dielectric layer over and along sidewalls of a semiconductor fin. The method further includes depositing an n-type work function metal layer over the high-k gate dielectric layer and performing a passivation treatment on the high-k gate dielectric layer through the n-type work function metal layer. The passivation treatment comprises a remote plasma process. The method further includes depositing a fill metal over the n-type work function metal layer to form a metal gate stack over the high-k gate dielectric layer. The metal gate stack comprising the n-type work function metal layer and the fill metal.
    Type: Grant
    Filed: July 20, 2022
    Date of Patent: February 27, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Pei Ying Lai, Chia-Wei Hsu, Cheng-Hao Hou, Xiong-Fei Yu, Chi On Chui
  • Publication number: 20090195196
    Abstract: A control device for driving a motor which includes a rotor and a stator is provided. The control device includes a Hall detector and driving circuit. The Hall detector detects magnetic flux variation when the rotor rotates and generates a first detection signal and a second detection signal. The first and second detection signals represent current rotation location when the rotor rotates. The driving circuit generates a driving signal to drive the stator. The driving circuit turns on or off the driving signal according to a control signal and the relationship between the first and second detection signals.
    Type: Application
    Filed: October 9, 2008
    Publication date: August 6, 2009
    Inventors: Chi-Wei HSU, Chi-Lin HSU
  • Publication number: 20080242803
    Abstract: A polypropylene derivative is provided. The polypropylene derivative includes a reactive monomer grafted on polypropylene, with a grafting yield exceeding 5%. A method for preparing the polypropylene derivative is also disclosed. The method includes mixing a reactive monomer, polypropylene and a compatibilizer to prepare a polypropylene derivative grafted with the reactive monomer, with a grafting yield exceeding 5%.
    Type: Application
    Filed: June 9, 2008
    Publication date: October 2, 2008
    Inventors: Lien Tai CHEN, Chi-Wei Hsu, Tun-Fun Way, Jian-Lin Hua
  • Publication number: 20080161498
    Abstract: A polypropylene derivative is provided. The polypropylene derivative includes a reactive monomer grafted on polypropylene, with a grafting yield exceeding 5%. A method of preparing the polypropylene derivative is also disclosed. The method includes mixing a reactive monomer, polypropylene, and a compatibilizer in a twin screw extruder to prepare a polypropylene derivative with reactive monomers grafted thereon, with a grafting ratio exceeding 5%.
    Type: Application
    Filed: October 15, 2007
    Publication date: July 3, 2008
    Inventors: Lien Tai Chen, Chi-Wei Hsu, Tun-Fun Way, Jian-Lin Hua