Patents by Inventor Chi XIE

Chi XIE has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10546951
    Abstract: A trench MOS device with improved single event burnout endurance, applied in the field of semiconductor. The device is provided, in an epitaxial layer, with a conductive type semiconductor pillar connected to a source and a second conductive type current-directing region. Whereby, the trajectory of the electron-hole pairs induced by the single event effect is changed and thus avoids the single event burnout caused by the triggering of parasitic transistors, therefore improving the endurance of the single event burnout of the trench MOS device.
    Type: Grant
    Filed: September 17, 2016
    Date of Patent: January 28, 2020
    Assignees: University of Electronic Science and Technology of China, Institute of Electronic and Information Engineering of UESTC in Guangdong
    Inventors: Min Ren, Yuci Lin, Chi Xie, Zhiheng Su, Zehong Li, Jinping Zhang, Wei Gao, Bo Zhang
  • Patent number: 10516203
    Abstract: A mobile terminal, including a display screen, a rear cover facing the display screen, a metal frame, and a circuit board; the metal frame and the circuit board are between the display screen and the rear cover and extend along outer profile of the rear cover. The antenna system includes at least one antenna unit. Each antenna unit includes a first gap in the metal frame and a second gap communicated with the first gap; the first gap extends along perimeter of the metal frame to form a strip-like hollow; the second gap extends from the middle of the first gap toward the rear cover until through the metal frame so as to divide the metal frame into a first section and a second section; the first section and the second section are electrically connected with the feeding point to form a first radiator and a second radiator, respectively.
    Type: Grant
    Filed: February 12, 2018
    Date of Patent: December 24, 2019
    Assignee: AAC Technologies Pte. Ltd.
    Inventors: Jianchuan Liu, Yuehua Yue, Wei Yan, Li Han, Chi Xie
  • Publication number: 20190371937
    Abstract: A trench MOS device with improved single event burnout endurance, applied in the field of semiconductor. The device is provided, in an epitaxial layer, with a conductive type semiconductor pillar connected to a source and a second conductive type current-directing region. Whereby. the trajectory of the electron-hole pairs induced by the single event effect is changed and thus avoids the single event burnout caused by the triggering of parasitic transistors, therefore improving the endurance of the single event burnout of the trench MOS device.
    Type: Application
    Filed: September 17, 2016
    Publication date: December 5, 2019
    Applicants: University of Electronic Science and Technology of China, Institute of Electronic and Information Engineering of UESTC in Guangdong
    Inventors: Min REN, Yuci LIN, Chi XIE, Zhiheng SU, Zehong LI, Jinping ZHANG, Wei GAO, Bo ZHANG
  • Publication number: 20180375197
    Abstract: A mobile terminal, including a display screen, a rear cover facing the display screen, a metal frame, and a circuit board; the metal frame and the circuit board are between the display screen and the rear cover and extend along outer profile of the rear cover. The antenna system includes at least one antenna unit. Each antenna unit includes a first gap in the metal frame and a second gap communicated with the first gap; the first gap extends along perimeter of the metal frame to form a strip-like hollow; the second gap extends from the middle of the first gap toward the rear cover until through the metal frame so as to divide the metal frame into a first section and a second section; the first section and the second section are electrically connected with the feeding point to form a first radiator and a second radiator, respectively.
    Type: Application
    Filed: February 12, 2018
    Publication date: December 27, 2018
    Inventors: Jianchuan Liu, Yuehua Yue, Wei Yan, Li Han, Chi Xie
  • Publication number: 20180026129
    Abstract: Edge termination structures for power semiconductor devices (or power devices) are disclosed. The purpose of this invention is to reduce the difficulty of deep trench etching and dielectric filling by adopting an inverted trapezoidal trench. In order to save the area of edge termination and get a high blocking voltage on condition that the angle between the sidewall of the trench and horizontal is large, fixed charges are introduced at a particular location in the trench. Due to the Coulomb interaction between the ionized impurity in the drift region and the fixed charges, the depletion region of the terminal PN junction can extend fully, which relieves the concentration of electric field there. Therefore, the edge termination can exhibit a high breakdown voltage near to that of the parallel plane junction with a smaller area and the reduced technical difficulty of deep trench etching and dielectric filling.
    Type: Application
    Filed: May 23, 2017
    Publication date: January 25, 2018
    Applicant: University of Electronic Science and Technology of China
    Inventors: Min REN, Chi XIE, Jiaju LI, Ziqi ZHONG, Zehong LI, Jinping ZHANG, Wei GAO, Bo ZHANG