Patents by Inventor Chi-Yang Lin
Chi-Yang Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240133018Abstract: A metal mask includes: a mask body having two opposite first side edges along a first direction and two opposite second side edges along a second direction, and each of the first side edges having a first length. The mask body includes an open slot region, two first fixing regions, and two first clamping regions, where the two first fixing regions are positioned on two opposite sides of the open slot region, respectively, and each of the first clamping regions is positioned between each of the first fixing regions and each of the first side edges. A first gap is formed in each of the first side edges, the first gap has a first opening length in the first direction, and a ratio of the first opening length to the first length being between 0.2 and 0.8. The metal mask may improve the problem of wrinkles.Type: ApplicationFiled: March 22, 2023Publication date: April 25, 2024Inventors: YunPei Yang, Chi-Wei Lin
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Publication number: 20240136291Abstract: Semiconductor devices and methods of forming the same are provided. In some embodiments, a method includes receiving a workpiece having a redistribution layer disposed over and electrically coupled to an interconnect structure. In some embodiments, the method further includes patterning the redistribution layer to form a recess between and separating a first conductive feature and a second conductive feature of the redistribution layer, where corners of the first conductive feature and the second conductive feature are defined adjacent to and on either side of the recess. The method further includes depositing a first dielectric layer over the first conductive feature, the second conductive feature, and within the recess. The method further includes depositing a nitride layer over the first dielectric layer. In some examples, the method further includes removing portions of the nitride layer disposed over the corners of the first conductive feature and the second conductive feature.Type: ApplicationFiled: January 12, 2023Publication date: April 25, 2024Inventors: Hsiang-Ku SHEN, Chen-Chiu HUANG, Chia-Nan LIN, Man-Yun WU, Wen-Tzu CHEN, Sean YANG, Dian-Hao CHEN, Chi-Hao CHANG, Ching-Wei LIN, Wen-Ling CHANG
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Patent number: 11957722Abstract: The present invention discloses an anti-aging composition, which includes: (a) isolated lactic acid bacterial strains or a fermented product thereof; and (b) an excipient, a diluent, or a carrier; wherein the isolated lactic acid bacterial strains include: Bifidobacterium bifidum VDD088 strains, Bifidobacterium breve Bv-889 strains, and Bifidobacterium longum BLI-02 strains. The present invention further provides a method for preventing aging by administering the foregoing anti-aging composition to a subject in need thereof.Type: GrantFiled: March 7, 2022Date of Patent: April 16, 2024Assignee: GLAC BIOTECH CO., LTDInventors: Hsieh-Hsun Ho, Yi-Wei Kuo, Wen-Yang Lin, Jia-Hung Lin, Yen-Yu Huang, Chi-Huei Lin, Shin-Yu Tsai
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Publication number: 20240071888Abstract: A package structure including a redistribution circuit structure, a wiring substrate, first conductive terminals, an insulating encapsulation, and a semiconductor device is provided. The redistribution circuit structure includes stacked dielectric layers, redistribution wirings and first conductive pads. The first conductive pads are disposed on a surface of an outermost dielectric layer among the stacked dielectric layers, the first conductive pads are electrically connected to outermost redistribution pads among the redistribution wirings by via openings of the outermost dielectric layer, and a first lateral dimension of the via openings is greater than a half of a second lateral dimension of the outermost redistribution pads. The wiring substrate includes second conductive pads. The first conductive terminals are disposed between the first conductive pads and the second conductive pads. The insulating encapsulation is disposed on the surface of the redistribution circuit structure.Type: ApplicationFiled: August 28, 2022Publication date: February 29, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chien-Chang Lin, Yen-Fu Su, Chin-Liang Chen, Wei-Yu Chen, Hsin-Yu Pan, Yu-Min Liang, Hao-Cheng Hou, Chi-Yang Yu
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Patent number: 9423242Abstract: A board-warping measuring method is configured to measure a device under test. The device under test is disposed on a measuring carrier. The board-warping measuring method includes: projecting a pattern onto the device under test, wherein the pattern includes plural reference points; capturing a measurement image by an image-capturing module when the pattern is projected onto the device under test, wherein the measurement image includes plural measurement points respectively corresponding to the reference points; calculating a position of each of the measurement points in the measurement image by utilizing a transfer function corresponding to each of the reference points to obtain position heights of the device under test corresponding to the measurement points; and compensating for board warping of the device under test based on the position heights of the device under test corresponding to the measurement points.Type: GrantFiled: April 23, 2015Date of Patent: August 23, 2016Assignee: Test Research, Inc.Inventors: Liang-Pin Yu, Ying-Lin Pan, Chi-Yang Lin
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Publication number: 20160209206Abstract: A board-warping measuring method is configured to measure a device under test. The device under test is disposed on a measuring carrier. The board-warping measuring method includes: projecting a pattern onto the device under test, wherein the pattern includes plural reference points; capturing a measurement image by an image-capturing module when the pattern is projected onto the device under test, wherein the measurement image includes plural measurement points respectively corresponding to the reference points; calculating a position of each of the measurement points in the measurement image by utilizing a transfer function corresponding to each of the reference points to obtain position heights of the device under test corresponding to the measurement points; and compensating for board warping of the device under test based on the position heights of the device under test corresponding to the measurement points.Type: ApplicationFiled: April 23, 2015Publication date: July 21, 2016Inventors: Liang-Pin YU, Ying-Lin PAN, Chi-Yang LIN
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Publication number: 20080221885Abstract: A speech control apparatus and a method thereof are provided. The speech control apparatus logs the user in an application software according to a speech signal of a user. The speech control apparatus is connected to a password bank comprising a plurality of accounts and passwords. The speech control apparatus comprises a speech process module, a start module, a first receive module, an identity recognition module, a selection module, and a login module. The speech process module determines a meaning of the speech signal. The start module starts the application software according to the meaning of the speech signal. The first receiving module receives the biometrics feature of the user. The identity recognition module identifies the user as authorized according to the biometrics feature. The selection module selects a login set of account and password from the password bank according to the speech signal and the biometrics feature.Type: ApplicationFiled: June 19, 2007Publication date: September 11, 2008Applicant: Arachnoid Biometrics Identification Group CorpInventor: Chi-Yang Lin
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Publication number: 20050044299Abstract: An SOC has a processor, an internal high-speed bridge circuit, an internal low-speed bridge circuit, and an expansion port. The expansion port is capable of selectively being connected to an external low-speed bridge circuit for expanding functionality of the internal low-speed bridge circuit.Type: ApplicationFiled: March 1, 2004Publication date: February 24, 2005Inventors: Chi-Yang Lin, Mike Chen
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Publication number: 20050035957Abstract: A display controller and a related method for calibrating display driving voltages according to input resistance of a monitor. The display controller has a digital-to-analog converter (DAC) for converting a display data into a corresponding display driving voltage. The DAC has a current mirror circuit for converting the display data to an output current in proportion to a reference current according to a mirror ratio, and a voltage calibration circuit for adjusting the mirror ratio according to the display driving voltage and a predetermined display driving voltage to make the display driving voltage approach the predetermined display driving voltage with an adjustment of the output current.Type: ApplicationFiled: March 17, 2004Publication date: February 17, 2005Inventors: Chi-Yang Lin, Peter Chen
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Publication number: 20040135785Abstract: A digital data processing system includes a central processing unit and a graphics processor, and the graphics processor includes a transformation/lighting engine. When graphics data, e.g. vertex data, are received, a utilization rate of the central processing unit is detected. Afterward, the graphics data are allocated to either the central processing unit or the transformation/lighting engine of the graphics processor according to the utilization rate of the central processing unit.Type: ApplicationFiled: October 23, 2003Publication date: July 15, 2004Inventors: Chi-Yang Lin, Eric Chuang, Macalas Yen
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Publication number: 20040017374Abstract: A method for accessing image data is used in a computer system. The computer system includes a core logic unit, a system memory, a graphics accelerator, and an image data outputting device in communication with a south bridge chip of the core logic unit. The method comprises the following steps. Firstly, image data are received from the image data outputting device by the core logic unit. Then, the image data are written into an AGP memory block of the system memory. Afterwards, the image data are accessed in the AGP memory block by the graphics accelerator.Type: ApplicationFiled: July 9, 2003Publication date: January 29, 2004Inventors: Chi-Yang Lin, Macalas Yen, Wen-Lung Hsu, Jiing Lin
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Publication number: 20040017378Abstract: An overlay frame processing method and device are used for showing a display frame and an overlay frame outputted by a digital image processing device on a display. The display frame and the overlay frame respectively consist of display frame pixel data and overlay frame pixel data at corresponding positions. A display controller and an overlay engine read and transmit the display frame pixel data and the overlay frame pixel data out, respectively. An alpha-blending engine receives and performs an alpha-blending operation on the display frame pixel data and the overlay frame pixel data to obtain an alpha-blended pixel data. A digital-to-analog converter converts the alpha-blended pixel data into an analog signal and transmits the analog signal to the display to be displayed.Type: ApplicationFiled: July 9, 2003Publication date: January 29, 2004Inventors: Chi-Yang Lin, Titan Sun, Daniel Chen, Stam Chuang
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Publication number: 20030174144Abstract: A method for adjusting a color value of an overlay image frame for use in a system including a digital image processing device and a display device is disclosed. The method includes the steps of revealing an overlay image frame on the display device, and adjusting a color value of the overlay image frame by the digital image processing device in response to a triggering of a hot-key input signal.Type: ApplicationFiled: July 29, 2002Publication date: September 18, 2003Applicant: Via Technologies, Inc.Inventor: Chi-Yang Lin