Abstract: A gamma voltage generator, a source driver and a display apparatus are provided. The gamma voltage generator is connected with a plurality of channel circuits and is used for outputting the predetermined number of gamma voltages, and each channel circuit selects at least one gamma voltage according to input display data to generate a corresponding data voltage. The gamma voltage generator includes a plurality of basic buffers and a plurality of dynamic buffers. Each dynamic buffer is configured to operate in a first mode of not outputting a buffer voltage or in a second mode of outputting a buffer voltage, wherein, the plurality of dynamic buffers switch from the first mode to the second mode based on update or change of the display data. The buffer voltages from the two types of buffers are used to generate the gamma voltages.

Abstract: A feedback control system includes a driver chip and a power chip. The driver chip includes a first output terminal and a first input terminal. The first output terminal is to output a first detection voltage. The power chip includes a second input terminal and a second output terminal. The second input terminal is directly connected to the first output terminal, and the second output terminal is coupled to the first input terminal. The power chip generates a driving voltage according to the first detection voltage and outputs the driving voltage to the first input terminal.

Abstract: A gamma voltage generator, a source driver and a display apparatus are provided. The gamma voltage generator includes a gamma voltage generating circuit and a plurality of buffers. The gamma voltage generating circuit has a plurality of voltage input end nodes and a plurality of voltage output end nodes for outputting the predetermined number of gamma voltages based on input voltages from the plurality of voltage input end nodes. Each buffer has an input end receive a corresponding gamma reference voltage, and an output end coupled to a corresponding voltage input end node. The gamma voltage generating circuit includes multiple resistor units connected in series, and each resistor unit is configured to have a second resistance value when operating in the second mode less than a first resistance value when operating in the first mode.

Abstract: A gamma voltage generator, a source driver and a display apparatus are provided. The gamma voltage generator is connected with a plurality of channel circuits and is used for outputting the predetermined number of gamma voltages, and each channel circuit selects at least one gamma voltage according to input display data to generate a corresponding data voltage. The gamma voltage generator includes a plurality of basic buffers and a plurality of dynamic buffers. Each dynamic buffer is configured to operate in a first mode of not outputting a buffer voltage or in a second mode of outputting a buffer voltage, wherein, the plurality of dynamic buffers switch from the first mode to the second mode based on update or change of the display data. The buffer voltages from the two types of buffers are used to generate the gamma voltages.

Abstract: A novel quadrature phase-shift keying (QPSK) demodulator, called the bowknot quadrature phase-shift keying (BQPSK) demodulator, is disclosed. The BQPSK demodulator uses a delay circuit to delay a BQPSK signal and mixes the delayed BQPSK signal with the undelayed BQPSK signal to output an I-channel data signal and a Q-channel data signal. The BQPSK demodulator further uses a phase rotation circuit to demodulate the orthogonal data signals and obtain a recovery clock signal. The BQPSK demodulator neither uses an A/D converter nor uses a quadrature oscillator, featuring high data rate, low power consumption, simple architecture and superior reliability. The BQPSK demodulator can be realized by digital circuits and analog circuits.

Abstract: A novel quadrature phase-shift keying (QPSK) demodulator, called the bowknot quadrature phase-shift keying (BQPSK) demodulator, is disclosed. The BQPSK demodulator uses a delay circuit to delay a BQPSK signal and mixes the delayed BQPSK signal with the undelayed BQPSK signal to output an I-channel data signal and a Q-channel data signal. The BQPSK demodulator further uses a phase rotation circuit to demodulate the orthogonal data signals and obtain a recovery clock signal. The BQPSK demodulator neither uses an A/D converter nor uses a quadrature oscillator, featuring high data rate, low power consumption, simple architecture and superior reliability. The BQPSK demodulator can be realized by digital circuits and analog circuits.

Abstract: The present invention discloses BPSK demodulator, which uses a delay circuit to delay a BPSK signal and mixes the delayed BPSK signal with the undelayed BPSK signal to output a demodulated data signal, and which uses a phase rotation circuit and the demodulated data signal to obtain a carrier clock signal. The operating frequency of the delay circuit is the same as or 0.5 times the carrier frequency. Therefore, the present invention consumes less power and is realized by digital circuits and analog circuits.