Patents by Inventor Chi-Ying WU
Chi-Ying WU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12266543Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate having a base portion and a fin portion over the base portion. The semiconductor device structure includes an isolation layer over the base portion and surrounding the fin portion. The semiconductor device structure includes a metal gate stack over the isolation layer and wrapping around an upper part of the fin portion. The metal gate stack includes a gate dielectric layer and a metal gate electrode layer over the gate dielectric layer, and the gate dielectric layer includes fluorine. A first part of the isolation layer is not covered by the metal gate stack, the first part includes fluorine, and a first concentration of fluorine in the first part increases toward a first top surface of the first part.Type: GrantFiled: May 24, 2021Date of Patent: April 1, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: I-Ming Chang, Chih-Cheng Lin, Chi-Ying Wu, Wei-Ming You, Ziwei Fang, Huang-Lin Chao
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Publication number: 20240395564Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate having a base portion and a fin portion over the base portion. The semiconductor device structure includes an isolation layer over the base portion and surrounding the fin portion. The isolation layer includes fluorine, and a first concentration of fluorine in the isolation layer increases toward a top surface of the isolation layer. The semiconductor device structure includes a gate stack over the isolation layer and wrapping around the fin portion.Type: ApplicationFiled: July 31, 2024Publication date: November 28, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: I-Ming CHANG, Chih-Cheng LIN, Chi-Ying WU, Wei-Ming YOU, Ziwei FANG, Huang-Lin CHAO
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Publication number: 20240290588Abstract: An ion collector includes a plurality of segments and a plurality of integrators. The plurality of segments are physically separated from one another and spaced around a substrate support. Each of the segments includes a conductive element that is designed to conduct a current based on ions received from a plasma. Each of the plurality of integrators is coupled to a corresponding conductive element. Each of the plurality of integrators is designed to determine an ion distribution for a corresponding conductive element based, at least in part, on the current conducted at the corresponding conductive element. An example benefit of this embodiment includes the ability to determine how uniform the ion distribution is across a wafer being processed by the plasma.Type: ApplicationFiled: May 3, 2024Publication date: August 29, 2024Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Otto CHEN, Chi-Ying WU, Chia-Chih CHEN
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Patent number: 11996276Abstract: An ion collector includes a plurality of segments and a plurality of integrators. The plurality of segments are physically separated from one another and spaced around a substrate support. Each of the segments includes a conductive element that is designed to conduct a current based on ions received from a plasma. Each of the plurality of integrators is coupled to a corresponding conductive element. Each of the plurality of integrators is designed to determine an ion distribution for a corresponding conductive element based, at least in part, on the current conducted at the corresponding conductive element. An example benefit of this embodiment includes the ability to determine how uniform the ion distribution is across a wafer being processed by the plasma.Type: GrantFiled: February 13, 2023Date of Patent: May 28, 2024Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Otto Chen, Chi-Ying Wu, Chia-Chih Chen
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Publication number: 20230197424Abstract: An ion collector includes a plurality of segments and a plurality of integrators. The plurality of segments are physically separated from one another and spaced around a substrate support. Each of the segments includes a conductive element that is designed to conduct a current based on ions received from a plasma. Each of the plurality of integrators is coupled to a corresponding conductive element. Each of the plurality of integrators is designed to determine an ion distribution for a corresponding conductive element based, at least in part, on the current conducted at the corresponding conductive element. An example benefit of this embodiment includes the ability to determine how uniform the ion distribution is across a wafer being processed by the plasma.Type: ApplicationFiled: February 13, 2023Publication date: June 22, 2023Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Otto CHEN, Chi-Ying WU, Chia-Chih CHEN
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Patent number: 11581169Abstract: An ion collector includes a plurality of segments and a plurality of integrators. The plurality of segments are physically separated from one another and spaced around a substrate support. Each of the segments includes a conductive element that is designed to conduct a current based on ions received from a plasma. Each of the plurality of integrators is coupled to a corresponding conductive element. Each of the plurality of integrators is designed to determine an ion distribution for a corresponding conductive element based, at least in part, on the current conducted at the corresponding conductive element. An example benefit of this embodiment includes the ability to determine how uniform the ion distribution is across a wafer being processed by the plasma.Type: GrantFiled: December 5, 2019Date of Patent: February 14, 2023Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Otto Chen, Chi-Ying Wu, Chia-Chih Chen
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Publication number: 20210280432Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate having a base portion and a fin portion over the base portion. The semiconductor device structure includes an isolation layer over the base portion and surrounding the fin portion. The semiconductor device structure includes a metal gate stack over the isolation layer and wrapping around an upper part of the fin portion. The metal gate stack includes a gate dielectric layer and a metal gate electrode layer over the gate dielectric layer, and the gate dielectric layer includes fluorine. A first part of the isolation layer is not covered by the metal gate stack, the first part includes fluorine, and a first concentration of fluorine in the first part increases toward a first top surface of the first part.Type: ApplicationFiled: May 24, 2021Publication date: September 9, 2021Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: I-Ming CHANG, Chih-Cheng LIN, Chi-Ying WU, Wei-Ming YOU, Ziwei FANG, Huang-Lin CHAO
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Patent number: 11018022Abstract: A method for forming a semiconductor device structure is provided. The method includes depositing a gate dielectric layer over a substrate. The substrate has a base portion and a first fin portion over the base portion, and the gate dielectric layer is over the first fin portion. The method includes forming a gate electrode layer over the gate dielectric layer. The gate electrode layer includes fluorine. The method includes annealing the gate electrode layer and the gate dielectric layer so that fluorine from the gate electrode layer diffuses into the gate dielectric layer.Type: GrantFiled: July 13, 2018Date of Patent: May 25, 2021Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: I-Ming Chang, Chih-Cheng Lin, Chi-Ying Wu, Wei-Ming You, Ziwei Fang, Huang-Lin Chao
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Publication number: 20200111651Abstract: An ion collector includes a plurality of segments and a plurality of integrators. The plurality of segments are physically separated from one another and spaced around a substrate support. Each of the segments includes a conductive element that is designed to conduct a current based on ions received from a plasma. Each of the plurality of integrators is coupled to a corresponding conductive element. Each of the plurality of integrators is designed to determine an ion distribution for a corresponding conductive element based, at least in part, on the current conducted at the corresponding conductive element. An example benefit of this embodiment includes the ability to determine how uniform the ion distribution is across a wafer being processed by the plasma.Type: ApplicationFiled: December 5, 2019Publication date: April 9, 2020Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Otto Chen, Chi-Ying Wu, Chia-Chih Chen
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Patent number: 10553411Abstract: An ion collector includes a plurality of segments and a plurality of integrators. The plurality of segments are physically separated from one another and spaced around a substrate support. Each of the segments includes a conductive element that is designed to conduct a current based on ions received from a plasma. Each of the plurality of integrators is coupled to a corresponding conductive element. Each of the plurality of integrators is designed to determine an ion distribution for a corresponding conductive element based, at least in part, on the current conducted at the corresponding conductive element. An example benefit of this embodiment includes the ability to determine how uniform the ion distribution is across a wafer being processed by the plasma.Type: GrantFiled: September 10, 2015Date of Patent: February 4, 2020Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Otto Chen, Chi-Ying Wu, Chiah-Chih Chen
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Publication number: 20200020544Abstract: A method for forming a semiconductor device structure is provided. The method includes depositing a gate dielectric layer over a substrate. The substrate has a base portion and a first fin portion over the base portion, and the gate dielectric layer is over the first fin portion. The method includes forming a gate electrode layer over the gate dielectric layer. The gate electrode layer includes fluorine. The method includes annealing the gate electrode layer and the gate dielectric layer so that fluorine from the gate electrode layer diffuses into the gate dielectric layer.Type: ApplicationFiled: July 13, 2018Publication date: January 16, 2020Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: I-Ming CHANG, Chih-Cheng LIN, Chi-Ying WU, Wei-Ming YOU, Ziwei FANG, Huang-Lin CHAO