Patents by Inventor Chi-Yu Chou

Chi-Yu Chou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method for forming seed layer structure
    Patent number: 8778801
    Abstract: A seed layer comprises a bottom seed layer portion formed on the bottom of a via opening, a sidewall seed layer portion formed on an upper portion of the sidewall of the via opening and a corner seed layer portion formed between the bottom seed layer portion and the sidewall seed layer portion. The sidewall seed layer portion is of a first thickness. The corner seed layer portion is of a second thickness and the second thickness is greater than the first thickness.
    Type: Grant
    Filed: September 21, 2012
    Date of Patent: July 15, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chen-Bin Chiang, Hung-Chih Wang, Kuei-Pin Lee, Chi-Yu Chou, Yao Hsiang Liang
  • Barrier Layer for Copper Interconnect
    Publication number: 20140191402
    Abstract: A device including a dielectric layer overlying a substrate, a conductive line with a sidewall in the dielectric layer, a Ta layer adjoining the sidewall of the conductive line, and a metal oxide formed between the Ta layer and the dielectric layer.
    Type: Application
    Filed: March 11, 2014
    Publication date: July 10, 2014
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Hung Lin, Chi-Yu Chou, Kuei-Pin Lee, Chen-Kuang Lien, Yu-Chang Hsiao, Yao-Hsiang Liang, Yu-Min Chang
  • Barrier layer for copper interconnect
    Patent number: 8722531
    Abstract: A method for forming an interconnect structure includes forming a dielectric layer overlying a substrate, forming a metal-containing layer in the dielectric layer, forming a barrier layer overlying the metal-containing layer, and performing a thermal process to form a metal oxide layer underlying the conductive layer. The metal oxide layer is a barrier layer formed at the boundary between the dielectric layer and the metal-containing layer.
    Type: Grant
    Filed: November 1, 2012
    Date of Patent: May 13, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Hung Lin, Chi-Yu Chou, Kuei-Pin Lee, Chen-Kuang Lien, Yu-Chang Hsiao, Yao-Hsiang Liang, Yu-Min Chang