Abstract: The present disclosure relates to an integrated chip. The integrated chip includes a first capacitor conductor disposed over an isolation structure arranged within a substrate. The isolation structure laterally extends past opposing outer sidewalls of the first capacitor conductor. A capacitor dielectric is arranged along one of the opposing outer sidewalls of the first capacitor conductor and over a top surface of the first capacitor conductor. A second capacitor conductor is arranged along an outer sidewall of the capacitor dielectric and over a top surface of the capacitor dielectric. The second capacitor conductor laterally overlaps parts of both the capacitor dielectric and the first capacitor conductor.

Abstract: A predictive maintenance system and an implementation method thereof are provided. The system includes a mainboard, a sensing interface card coupled to the mainboard, and a predictive maintenance program. The mainboard includes a storage for storing a computer program and one or more processors for executing the computer program. The sensing interface card includes a sensor connection port that is configured to connect external device sensors with different connection interfaces and to receive detection values detected by the external device sensors, and a microprocessor for receiving the detection values to generate a failure prediction analysis result. The predictive maintenance program stored in the storage is executed by the processors.

Abstract: A gate oxide layer for a high voltage transistor is formed using methods that avoid thinning in the corners of the gate oxide layer. A recess is formed in a silicon substrate. The exposed surfaces of the recess are thermally oxidized to form a thermal oxide layer of the gate oxide layer. A high temperature oxide layer of the gate oxide layer is then formed within the exposed surfaces of the recess by chemical vapor deposition. The combination of the thermal oxide layer and the high temperature oxide layer results in a gate oxide layer that does not exhibit the double hump phenomenon in the drain current vs. gate voltage curve. The high temperature oxide layer may include a rim that extends out of the recess.

Abstract: A integrated circuit includes a first, a second, a third, and a fourth gate, a first input pin and a first conductor. The first and third gate are on a first level. The second and fourth gate are on a second level. The second gate is coupled to the first gate. The fourth gate is coupled to the third gate. The first input pin extends in a second direction, is on a first metal layer above a front-side of a substrate, is coupled to the first gate, and configured to receive a first input signal. The first input pin is electrically coupled to the third gate by the first, second or fourth gate. The first conductor extends in the first direction, is on a second metal layer below a back-side of the substrate, and is coupled to the second and fourth gate.

Abstract: The present invention provides a method for preparing an activated carbon, which includes impregnating a carbonaceous material with carbonated water; and exposing the carbonaceous material to microwave radiation to produce the activated carbon.

Abstract: Some embodiments relate to an integrated circuit device incorporating an etched recessed gate dielectric region. The integrated circuit device includes a substrate including a first upper surface, a gate dielectric region disposed at the first upper surface of the substrate and extending into the substrate, and a gate structure disposed over the gate dielectric region. The gate dielectric region includes a second upper surface and forms a recess extending below the second upper surface. The second upper surface includes a perimeter portion surrounding the recess. The gate structure completely covers the second upper surface of the gate dielectric region and extends into the recess.

Abstract: A resonance element supported by a bearing structure includes a crystal chip and an excitation electrode. The crystal chip includes a main surface having a support surface portion being in contact with the bearing structure. The excitation electrode is disposed on the main surface, has an electrode area, and includes an electrode indentation boundary partly encompassing the support surface portion. The electrode indentation boundary has a first boundary end and a second boundary end being opposite to the first boundary end. The electrode indentation boundary and a reference line segment defined by the first and the second boundary ends form an electrode indentation region having an indentation area. A ratio of the indentation area to the electrode area ranges from 0.05 to 0.2.

Abstract: A crystal device includes a bearing base, an integrated chip and a conductive adhesive unit. The bearing base includes a conductive seat. The integrated chip includes a principal reference plane facing the conductive seat, and having a first major axis. The conductive adhesive unit has a second major axis and an aspect ratio, and is at least partly disposed between the conductive seat and the integrated chip. The aspect ratio ranges from 1.1 to 1.9. The principal reference plane further has a perpendicular projection straight line defined according to the second major axis. A practical angle is included by the first perpendicular projection straight line and the first major axis, and ranges from 0 degree to 90 degrees.

Abstract: A resonance element supported by a bearing structure includes a crystal chip and an excitation electrode. The crystal chip includes a main surface having a support surface portion being in contact with the bearing structure. The excitation electrode is disposed on the main surface, has an electrode area, and includes an electrode indentation boundary partly encompassing the support surface portion. The electrode indentation boundary has a first boundary end and a second boundary end being opposite to the first boundary end. The electrode indentation boundary and a reference line segment defined by the first and the second boundary ends form an electrode indentation region having an indentation area. A ratio of the indentation area to the electrode area ranges from 0.05 to 0.2.

Abstract: A crystal device includes a bearing base, an integrated chip and a conductive adhesive unit. The bearing base includes a conductive seat. The integrated chip includes a principal reference plane facing the conductive seat, and having a first major axis. The conductive adhesive unit has a second major axis and an aspect ratio, and is at least partly disposed between the conductive seat and the integrated chip. The aspect ratio ranges from 1.1 to 1.9. The principal reference plane further has a perpendicular projection straight line defined according to the second major axis. A practical angle is included by the first perpendicular projection straight line and the first major axis, and ranges from 0 degree to 90 degrees.

Abstract: The present invention provides to an antenna. The antenna includes a piezoelectric-substrate layer; and a quasi-fractal radiating layer disposed on the piezoelectric-substrate layer and having a quadrangle sub-structure and a similar structure that is formed by a nth-order self-similar iteration process including a trimming step, a scaling step and a combining step on the basis of the quadrangle sub-structure, where n is an integer greater than zero.

Abstract: The present invention provides to an antenna. The antenna includes a piezoelectric-substrate layer; and a quasi-fractal radiating layer disposed on the piezoelectric-substrate layer and having a quadrangle sub-structure and a similar structure that is formed by a nth-order self-similar iteration process including a trimming step, a scaling step and a combining step on the basis of the quadrangle sub-structure, where n is an integer greater than zero.

Abstract: Hologram recording and reconstruction apparatuses and method thereof are provided. The hologram recording apparatus comprises a laser source, a spatial light modulator, and a Fourier lens. The laser source provides a coherent light beam. The spatial light modulator receives m-bits data to only determine a (p×q) block comprising ON-pixels less than OFF-pixels, and receives the coherent light beam to modulate with the (p×q) block to generate the signal beam. The Fourier lens focuses the signal beam on the hologram recording medium, so that when the focused signal beam and a focused reference beam is modulated together, the hologram data is generated to be recorded on the hologram recording medium.

Abstract: Sacrificial electrodes with fractal-shaped are formed on a SAW (surface acoustic wave) device. The sacrificial electrodes discharge electro-static charge in the SAW device for protecting the IDT (inter-digital transducer) from electrostatic break. Moreover, the sacrificial electrodes can control the path and the discharging degree of the electro-static discharge to avoid losing the electro-static discharge protection due to the sacrificial electrodes are broken.

Abstract: Sacrificial electrodes with fractal-shaped are formed on a SAW (surface acoustic wave) device. The sacrificial electrodes discharge electro-static charge in the SAW device for protecting the IDT (inter-digital transducer) from electrostatic break. Moreover, the sacrificial electrodes can control the path and the discharging degree of the electro-static discharge to avoid losing the electro-static discharge protection due to the sacrificial electrodes are broken.

Abstract: Sacrificial electrodes with fractal-shaped are formed on a SAW (surface acoustic wave) device. The sacrificial electrodes discharge electro-static charge in the SAW device for protecting the IDT (inter-digital transducer) from electrostatic break. Moreover, the sacrificial electrodes can control the path and the discharging degree of the electro-static discharge to avoid losing the electrostatic discharge protection due to the sacrificial electrodes are broken.

Abstract: Sacrificial electrodes with fractal-shaped are formed on a SAW (surface acoustic wave) device. The sacrificial electrodes discharge electro-static charge in the SAW device for protecting the IDT (inter-digital transducer) from electrostatic break. Moreover, the sacrificial electrodes can control the path and the discharging degree of the electro-static discharge to avoid losing the electrostatic discharge protection due to the sacrificial electrodes are broken.

Abstract: Sacrificial electrodes with fractal-shaped are formed on a SAW (surface acoustic wave) device. The sacrificial electrodes discharge electro-static charge in the SAW device for protecting the IDT (inter-digital transducer) from electrostatic break. Moreover, the sacrificial electrodes can control the path and the discharging degree of the electro-static discharge to avoid losing the electro-static discharge protection due to the sacrificial electrodes are broken.

Abstract: Sacrificial electrodes with fractal-shaped are formed on a SAW (surface acoustic wave) device. The sacrificial electrodes discharge electro-static charge in the SAW device for protecting the IDT (inter-digital transducer) from electrostatic break. Moreover, the sacrificial electrodes can control the path and the discharging degree of the electro-static discharge to avoid losing the electrostatic discharge protection due to the sacrificial electrodes are broken.