Patents by Inventor Chi-Yun Wang

Chi-Yun Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240033102
    Abstract: A surface-treated intervertebral fusion cage is provided, including a main body and a porous structure portion. The porous structure portion is arranged at the corresponding position of the upper and lower parts of the main body. The surface-treated intervertebral fusion cage can improve the biocompatibility, and the surface etching and thermal treatment can increase the coating coverage and increase the mechanical toughness of the cage of the present invention.
    Type: Application
    Filed: January 31, 2023
    Publication date: February 1, 2024
    Inventors: PIN-YI CHEN, PO-LIANG LAI, KUEI-CHIH FENG, CHI-SHUN TU, CHI-YUN WANG, YU-JIE WU, SHYANG-YIH KUNG, GUAN-YI HUNG
  • Publication number: 20240033101
    Abstract: A flexible intervertebral cage with opening is provided, including a main body, a porous structure part, a side opening, and a rear opening. The porous structure part is arranged at the corresponding positions of the upper and lower parts of the main body; the side opening are located on the two sides of the main body that are different from the upper and lower parts, and the rear opening is located at the other ends of the upper and lower parts of the main body opposite to the end part that connects the upper and lower part. As such, a C-shaped opening structure is used to effectively reduce stress shielding and stress transfer. The biomimetic porous structure of the structural part can promote the attachment and growth of bone cells.
    Type: Application
    Filed: January 31, 2023
    Publication date: February 1, 2024
    Inventors: PIN-YI CHEN, PO-LIANG LAI, KUEI-CHIH FENG, CHI-SHUN TU, CHI-YUN WANG, YU-JIE WU, SHYANG-YIH KUNG, GUAN-YI HUNG
  • Publication number: 20240025800
    Abstract: The present invention relates to a glass-ceramic composite material, which is a composite material with degradability and osteoconductivity, and is composed of CaO—MgO—SiO2 (CMS glass)+CaMgSi2O6 (CMS ceramic) and CaSO4 (CS ceramic). In addition to the CaO—MgO—SiO2 glass, this synthesized composite material mainly includes two ceramics of CaMgSi2O6 and CaSO4 in crystalline phase, wherein, both the CMS glass and CMS ceramic have high mechanical strength, biocompatibility and osteoconductivity, while CaSO4 has the characteristics of rapid degradation to promote bone ingrowth.
    Type: Application
    Filed: March 14, 2023
    Publication date: January 25, 2024
    Inventors: PIN-YI CHEN, PO-LIANG LAI, KUEI-CHIH FENG, CHI-SHUN TU, CHI-YUN WANG, YU-JIE WU, SHYANG-YIH KUNG, GUAN-YI HUNG
  • Publication number: 20230257299
    Abstract: A glass ceramic manufactured by sequentially performing the processes of melting and thermal decomposition, water quenching and sintering of a glass composite. The glass ceramic includes 38 wt % to 49 wt % CaO, 41 wt % to 52 wt % SiO2 and 0.1 wt % to 20 wt % P2O5. The glass composite includes a glass component and P2O5, and the glass component includes CaCO3 and SiO2 and does not include an alkali metal oxide. The melting and thermal composition temperature is from 1350° C. to 1650° C. The sintering temperature is from 750° C. to 1050° C. By the combination of CaO, SiO2 and P2O5 and the control of the contents of CaO, SiO2 and P2O5 within the aforementioned ranges, and the glass ceramic contains no alkali metal oxide, the glass ceramic has good mechanical strength and low cytotoxicity.
    Type: Application
    Filed: February 14, 2023
    Publication date: August 17, 2023
    Applicant: Ming Chi University of Technology
    Inventors: Yu-Jie Wu, Guan-Yi Hung, Pin-Yi Chen, Kuei-Chih Feng, Chi-Shun Tu, Chi-Yun Wang
  • Patent number: 9503038
    Abstract: A current controlling device includes: a first resistive circuit arranged to selectively conduct a first current to a first output terminal from a first input terminal; and a second resistive circuit arranged to selectively conduct a second current to a second output terminal from the first input terminal; wherein when the first resistive circuit conducts the first current to the first output terminal and when the second resistive circuit does not conduct the second current to the second output terminal, the first input terminal has a first input impedance; when the first resistive circuit does not conduct the first current to the first output terminal and when the second resistive circuit conducts the second current to the second output terminal, the first input terminal has a second input impedance substantially equal to the first input impedance.
    Type: Grant
    Filed: November 13, 2014
    Date of Patent: November 22, 2016
    Assignee: MEDIATEK INC.
    Inventors: Min-Hua Wu, Chih-Hong Lou, Yen-Chuan Huang, Chi-Yun Wang
  • Patent number: 9484877
    Abstract: A resonating device includes: an amplifying circuit having a first input terminal, and an output terminal for outputting an output signal; a first feedback circuit coupled between the first input terminal and the output terminal of the amplifying circuit; a second feedback circuit, coupled between the first input terminal and the output terminal of the amplifying circuit; and a gain adjusting circuit, having an input terminal for receiving an input signal, and a first output terminal coupled to the first input terminal of the amplifying circuit; wherein a first equivalent impedance on a first intermediate terminal in the first feedback circuit substantially equals a second equivalent impedance on a second intermediate terminal in the second feedback circuit, and the gain adjusting circuit is arranged to tune a transfer function from the input signal to the output signal.
    Type: Grant
    Filed: August 25, 2014
    Date of Patent: November 1, 2016
    Assignee: MEDIATEK INC.
    Inventors: Chi-Yun Wang, Chih-Hong Lou, Yen-Chuan Huang, Li-Han Hung
  • Patent number: 9385740
    Abstract: A SAR ADC including a comparator, an input switch unit, a positive conversion capacitor array, a negative conversion capacitor array, and a SAR controller is provided. The input switch unit alternately couples and decouples a differential analog input signal to the comparator. The positive and negative conversion capacitor arrays sample the differential analog input signal during the sampling phase. The SAR controller resets the switches in the capacitor arrays at the end of the sampling phase to change the sampled voltage into a residual signal, generates an intermediate digital code to control the switches during the conversion phase according to an output of the comparator to convert the residual signal to the intermediate digital code, generates the digital code according to the intermediate digital code, and uses an inverted intermediate digital code to control the switches at the end of the conversion phase.
    Type: Grant
    Filed: October 22, 2015
    Date of Patent: July 5, 2016
    Assignee: MEDIATEK INC.
    Inventors: Chi Yun Wang, Jen-Che Tsai, Shu-Wei Chu
  • Publication number: 20160134300
    Abstract: A SAR ADC including a comparator, an input switch unit, a positive conversion capacitor array, a negative conversion capacitor array, and a SAR controller is provided. The input switch unit alternately couples and decouples a differential analog input signal to the comparator. The positive and negative conversion capacitor arrays sample the differential analog input signal during the sampling phase. The SAR controller resets the switches in the capacitor arrays at the end of the sampling phase to change the sampled voltage into a residual signal, generates an intermediate digital code to control the switches during the conversion phase according to an output of the comparator to convert the residual signal to the intermediate digital code, generates the digital code according to the intermediate digital code, and uses an inverted intermediate digital code to control the switches at the end of the conversion phase.
    Type: Application
    Filed: October 22, 2015
    Publication date: May 12, 2016
    Inventors: Chi Yun Wang, Jen-Che Tsai, SHU-WEI CHU
  • Patent number: 9312879
    Abstract: A signal modulating device includes: an integrating circuit arranged to generate an integrated signal according to a scaled analog signal and a first feedback signal; a resonating circuit arranged to generate a resonating signal according to the integrated signal; a first signal converting circuit arranged to convert the resonating signal into a digital output signal; a second signal converting circuit arranged to convert the digital output signal into the first feedback signal; and a first impedance circuit having a first terminal receiving an analog signal and a second terminal coupled to the resonating circuit for altering the location of zeros in the forward-path transfer function and consequently shaping the signal transfer function (STF) of the signal modulating device; and a second impedance circuit having a first terminal receiving the analog signal and a second terminal coupled to the integrating circuit for generating the scaled analog signal.
    Type: Grant
    Filed: January 20, 2015
    Date of Patent: April 12, 2016
    Assignee: MEDIATEK INC.
    Inventors: Li-Han Hung, Yen-Chuan Huang, Chi-Yun Wang, Chih-Hong Lou
  • Publication number: 20160056835
    Abstract: A signal modulating device includes: an integrating circuit arranged to generate an integrated signal according to a scaled analog signal and a first feedback signal; a resonating circuit arranged to generate a resonating signal according to the integrated signal; a first signal converting circuit arranged to convert the resonating signal into a digital output signal; a second signal converting circuit arranged to convert the digital output signal into the first feedback signal; and a first impedance circuit having a first terminal receiving an analog signal and a second terminal coupled to the resonating circuit for altering the location of zeros in the forward-path transfer function and consequently shaping the signal transfer function (STF) of the signal modulating device; and a second impedance circuit having a first terminal receiving the analog signal and a second terminal coupled to the integrating circuit for generating the scaled analog signal.
    Type: Application
    Filed: January 20, 2015
    Publication date: February 25, 2016
    Inventors: Li-Han Hung, Yen-Chuan Huang, Chi-Yun Wang, Chih-Hong Lou
  • Publication number: 20160056783
    Abstract: A resonating device includes: an amplifying circuit having a first input terminal, and an output terminal for outputting an output signal; a first feedback circuit coupled between the first input terminal and the output terminal of the amplifying circuit; a second feedback circuit, coupled between the first input terminal and the output terminal of the amplifying circuit; and a gain adjusting circuit, having an input terminal for receiving an input signal, and a first output terminal coupled to the first input terminal of the amplifying circuit; wherein a first equivalent impedance on a first intermediate terminal in the first feedback circuit substantially equals a second equivalent impedance on a second intermediate terminal in the second feedback circuit, and the gain adjusting circuit is arranged to tune a transfer function from the input signal to the output signal.
    Type: Application
    Filed: August 25, 2014
    Publication date: February 25, 2016
    Inventors: Chi-Yun Wang, Chih-Hong Lou, Yen-Chuan Huang, Li-Han Hung
  • Patent number: 9263995
    Abstract: A multi-mode OPAMP-based circuit is provided. An input amplifying stage amplifies a pair of input differential signals to provide a pair of intermediate differential signals. An output amplifying stage amplifies the pair of intermediate differential signals to provide a pair of output differential signals. A first capacitor is disposed in a first negative feedback loop of the output amplifying stage. A second capacitor is disposed in a second negative feedback loop of the output amplifying stage. A third capacitor is selectively disposed in a first positive feedback loop of the output amplifying stage or coupled to the first capacitor in parallel according to a control signal. A fourth capacitor is selectively disposed in a second positive feedback loop of the output amplifying stage or coupled to the second capacitor in parallel according to the control signal.
    Type: Grant
    Filed: November 6, 2013
    Date of Patent: February 16, 2016
    Assignee: MEDIATEK INC.
    Inventors: Chi Yun Wang, Chih-Hong Lou
  • Patent number: 9263993
    Abstract: A low pass filter includes a first amplifier stage and a second amplifier stage. The first amplifier stage includes a differential operational amplifier, wherein the first amplifier stage is arranged to process a differential input signal to generate a differential intermediate signal, the differential input signal having a first input signal and a second input signal, and the differential intermediate signal having a first intermediate signal and a second intermediate signal. The second amplifier stage has no common-mode feedback and is arranged to process the differential intermediate signal to generate a differential output signal, wherein the differential output signal has a first output signal corresponding to the first input signal and a second output signal corresponding to the second input signal. Since the noisy common-mode feedback is removed from the second amplifier stage, the overall common-mode noise of the low pass filter can be decreased.
    Type: Grant
    Filed: April 22, 2014
    Date of Patent: February 16, 2016
    Assignee: MEDIATEK INC.
    Inventors: Tzu-Hsuin Peng, Chih-Hong Lou, Chao-Hsin Lu, Chi-Yun Wang, Chih-Jung Chen
  • Patent number: 9184730
    Abstract: A dynamic feed-forward OPAMP-based circuit is provided. A first amplifying stage amplifies a pair of input differential signals to provide a pair of intermediate differential signals. A second amplifying stage amplifies the pair of intermediate differential signals to provide a pair of output differential signals. A first capacitor is coupled to a non-inverting input terminal of the first amplifying stage. A second capacitor is coupled to an inverting input terminal of the first amplifying stage. A feed-forward transconductance stage is coupled between the first and second capacitors and the second amplifying stage. The first and second capacitors and the feed-forward stage form a high-frequency path with a first gain curve, and the first amplifying stage and the second amplifying stage form a high-gain path with a second gain curve. The operational amplifier provides an open-loop gain according to the first and second gain curves.
    Type: Grant
    Filed: December 23, 2013
    Date of Patent: November 10, 2015
    Assignee: MEDIATEK INC.
    Inventors: Chi Yun Wang, Chih-Hong Lou
  • Patent number: 9184754
    Abstract: An analog-to-digital converting device includes: an integrator arranged to generate an integrating signal according to an analog input signal and a first analog feedback signal; a low-pass filter arranged to generate a first filtered signal according to the integrating signal; an analog-to-digital converter arranged to generate a digital output signal according to the first filtered signal; and a first digital-to-analog converter arranged to generate the first analog feedback signal according to the digital output signal.
    Type: Grant
    Filed: November 13, 2014
    Date of Patent: November 10, 2015
    Assignee: MEDIATEK INC.
    Inventors: Yen-Chuan Huang, Chih-Hong Lou, Chi-Yun Wang, Li-Han Hung, Min-Hua Wu
  • Publication number: 20150303880
    Abstract: A low pass filter includes a first amplifier stage and a second amplifier stage. The first amplifier stage includes a differential operational amplifier, wherein the first amplifier stage is arranged to process a differential input signal to generate a differential intermediate signal, the differential input signal having a first input signal and a second input signal, and the differential intermediate signal having a first intermediate signal and a second intermediate signal. The second amplifier stage has no common-mode feedback and is arranged to process the differential intermediate signal to generate a differential output signal, wherein the differential output signal has a first output signal corresponding to the first input signal and a second output signal corresponding to the second input signal. Since the noisy common-mode feedback is removed from the second amplifier stage, the overall common-mode noise of the low pass filter can be decreased.
    Type: Application
    Filed: April 22, 2014
    Publication date: October 22, 2015
    Applicant: MEDIATEK INC.
    Inventors: Tzu-Hsuin Peng, Chih-Hong Lou, Chao-Hsin Lu, Chi-Yun Wang, Chih-Jung Chen
  • Publication number: 20150171811
    Abstract: A current controlling device includes: a first resistive circuit arranged to selectively conduct a first current to a first output terminal from a first input terminal; and a second resistive circuit arranged to selectively conduct a second current to a second output terminal from the first input terminal; wherein when the first resistive circuit conducts the first current to the first output terminal and when the second resistive circuit does not conduct the second current to the second output terminal, the first input terminal has a first input impedance; when the first resistive circuit does not conduct the first current to the first output terminal and when the second resistive circuit conducts the second current to the second output terminal, the first input terminal has a second input impedance substantially equal to the first input impedance.
    Type: Application
    Filed: November 13, 2014
    Publication date: June 18, 2015
    Inventors: Min-Hua Wu, Chih-Hong Lou, Yen-Chuan Huang, Chi-Yun Wang
  • Publication number: 20150171877
    Abstract: An analog-to-digital converting device includes: an integrator arranged to generate an integrating signal according to an analog input signal and a first analog feedback signal; a low-pass filter arranged to generate a first filtered signal according to the integrating signal; an analog-to-digital converter arranged to generate a digital output signal according to the first filtered signal; and a first digital-to-analog converter arranged to generate the first analog feedback signal according to the digital output signal.
    Type: Application
    Filed: November 13, 2014
    Publication date: June 18, 2015
    Inventors: Yen-Chuan Huang, Chih-Hong Lou, Chi-Yun Wang, Li-Han Hung, Min-Hua Wu
  • Publication number: 20140218113
    Abstract: A dynamic feed-forward OPAMP-based circuit is provided. A first amplifying stage amplifies a pair of input differential signals to provide a pair of intermediate differential signals. A second amplifying stage amplifies the pair of intermediate differential signals to provide a pair of output differential signals. A first capacitor is coupled to a non-inverting input terminal of the first amplifying stage. A second capacitor is coupled to an inverting input terminal of the first amplifying stage. A feed-forward transconductance stage is coupled between the first and second capacitors and the second amplifying stage. The first and second capacitors and the feed-forward stage form a high-frequency path with a first gain curve, and the first amplifying stage and the second amplifying stage form a high-gain path with a second gain curve. The operational amplifier provides an open-loop gain according to the first and second gain curves.
    Type: Application
    Filed: December 23, 2013
    Publication date: August 7, 2014
    Applicant: MediaTek Inc.
    Inventors: Chi Yun WANG, Chih-Hong LOU
  • Publication number: 20140132341
    Abstract: A multi-mode OPAMP-based circuit is provided. An input amplifying stage amplifies a pair of input differential signals to provide a pair of intermediate differential signals. An output amplifying stage amplifies the pair of intermediate differential signals to provide a pair of output differential signals. A first capacitor is disposed in a first negative feedback loop of the output amplifying stage. A second capacitor is disposed in a second negative feedback loop of the output amplifying stage. A third capacitor is selectively disposed in a first positive feedback loop of the output amplifying stage or coupled to the first capacitor in parallel according to a control signal. A fourth capacitor is selectively disposed in a second positive feedback loop of the output amplifying stage or coupled to the second capacitor in parallel according to the control signal.
    Type: Application
    Filed: November 6, 2013
    Publication date: May 15, 2014
    Applicant: MediaTek Inc.
    Inventors: Chi Yun WANG, Chih-Hong LOU