Patents by Inventor Chia Chen Yang

Chia Chen Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240098959
    Abstract: A method includes etching a first semiconductor fin and a second semiconductor fin to form first recesses. The first and the second semiconductor fins have a first distance. A third semiconductor fin and a fourth semiconductor fin are etched to form second recesses. The third and the fourth semiconductor fins have a second distance equal to or smaller than the first distance. An epitaxy is performed to simultaneously grow first epitaxy semiconductor regions from the first recesses and second epitaxy semiconductor regions from the second recesses. The first epitaxy semiconductor regions are merged with each other, and the second epitaxy semiconductor regions are separated from each other.
    Type: Application
    Filed: November 22, 2023
    Publication date: March 21, 2024
    Inventors: Kai-Hsuan Lee, Chia-Ta Yu, Cheng-Yu Yang, Sheng-Chen Wang, Sai-Hooi Yeong, Feng-Cheng Yang, Yen-Ming Chen
  • Patent number: D653254
    Type: Grant
    Filed: January 20, 2011
    Date of Patent: January 31, 2012
    Assignee: Compal Electronics, Inc.
    Inventors: Yen Wen Lu, Zhi Qing Wu, Chia Chen Yang
  • Patent number: D671902
    Type: Grant
    Filed: January 20, 2011
    Date of Patent: December 4, 2012
    Assignee: Compal Electronics, Inc.
    Inventors: Yen Wen Lu, Zhi Qing Wu, Chia Chen Yang
  • Patent number: D685805
    Type: Grant
    Filed: September 7, 2012
    Date of Patent: July 9, 2013
    Assignee: Compal Electronics, Inc.
    Inventors: Yen-Wen Lu, Chia-Chen Yang
  • Patent number: D744437
    Type: Grant
    Filed: June 24, 2013
    Date of Patent: December 1, 2015
    Assignee: COMPAL ELECTRONICS, INC.
    Inventors: Yen-Wen Lu, Chia-Chen Yang