Patents by Inventor Chia-Chi Hu

Chia-Chi Hu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11955975
    Abstract: A routing integrated circuit element is disclosed. The routing integrated circuit element is connected between a first and a second electronic module and includes a body, a first, and a second buffer element. A first side of the body is connected to the first electronic module. A second side is connected to the second electronic module and located on a different side from the first side. The distance between the second side and the second electronic module is shorter than the distance between the second side and the first electronic module. The first buffer element transmits an electronic signal from the first side to the second side. The second buffer element transmits the electronic signal from the second side to the first side, wherein the transmission directions of the electronic signals transmitted by the first buffer element and the second buffer element are opposite.
    Type: Grant
    Filed: December 17, 2021
    Date of Patent: April 9, 2024
    Assignee: LERAIN TECHNOLOGY CO., LTD.
    Inventors: Miaobin Gao, Chia-Chi Hu
  • Publication number: 20240077593
    Abstract: An optical radar includes an optical-signal receiving unit and an optical-signal pickup unit. The optical-signal receiving unit is configured to receive a reflected light. The optical-signal pickup unit is coupled to the optical-signal receiving unit and includes a first optical-signal filtering circuit and a second optical-signal filtering unit. The first optical-signal filtering circuit is configured to filter out a first interference pulse of the reflected light, wherein the first interference pulse has a first interference voltage value higher than a reference voltage. The second optical-signal filtering circuit is coupled to the first optical-signal filtering circuit and configured to generate a clock signal comprising a clock pulse; and filter out a second interference pulse that does not match the clock pulse in time point from the reflected light.
    Type: Application
    Filed: November 30, 2022
    Publication date: March 7, 2024
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chih-Chun CHEN, Yi-Chi LEE, Chia-Yu HU, Ji-Bin HORNG
  • Patent number: 11892962
    Abstract: A GENZ port structure includes a body, a plurality of high-speed input pins, a plurality of high-speed output pins, a plurality of ground pins, a power supply pin, a plurality of differential clock pins, and a plurality of parameter setting pins. The main body includes a first side and a second side. The plurality of high-speed input pins are arranged on the first side. The plurality of high-speed output pins are arranged on the second side. The plurality of ground pins are interspersed between the plurality of high-speed input pins and the plurality of output pins. The power supply pins, the plurality of differential clock pins and the plurality of parameter setting pins are respectively arranged on one of the first side or the second side. The plurality of parameter setting pins are used to adjust an internal parameter setting of the GENZ port structure.
    Type: Grant
    Filed: September 22, 2022
    Date of Patent: February 6, 2024
    Assignee: LeRain TECHNOLOGY CO., LTD.
    Inventors: Miaobin Gao, Chia-Chi Hu
  • Publication number: 20230385221
    Abstract: A GENZ port structure includes a body, a plurality of high-speed input pins, a plurality of high-speed output pins, a plurality of ground pins, a power supply pin, a plurality of differential clock pins, and a plurality of parameter setting pins. The main body includes a first side and a second side. The plurality of high-speed input pins are arranged on the first side. The plurality of high-speed output pins are arranged on the second side. The plurality of ground pins are interspersed between the plurality of high-speed input pins and the plurality of output pins. The power supply pins, the plurality of differential clock pins and the plurality of parameter setting pins are respectively arranged on one of the first side or the second side. The plurality of parameter setting pins are used to adjust an internal parameter setting of the GENZ port structure.
    Type: Application
    Filed: September 22, 2022
    Publication date: November 30, 2023
    Inventors: MIAOBIN GAO, CHIA-CHI HU
  • Patent number: 11778733
    Abstract: A signal transmission circuit packaging structure is disclosed. The signal transmission circuit packaging structure includes a body, a main circuit unit, power pins, input pins, output pins, control pins, and ground pins. The main circuit unit is arranged in the center of the body. The power pins supply power signal to the main circuit unit. The input pins and the output pins are arranged on a first and a second side of the body separately for electrically connecting to the main circuit unit. The control pins are arranged on the second side of the body and electrically connected to the main circuit unit. The ground pins are arranged at corners of the body to separate the input pins, the output pins, and the control pins.
    Type: Grant
    Filed: December 17, 2021
    Date of Patent: October 3, 2023
    Assignee: LERAIN TECHNOLOGY CO., LTD.
    Inventors: Miaobin Gao, Chia-Chi Hu
  • Patent number: 11778732
    Abstract: A signal transmission circuit packaging structure is disclosed. The signal transmission circuit packaging structure includes a body, a main circuit unit, power pins, input pins, output pins, control pins and ground pins. The main circuit unit is arranged in the center of the body. The power pins are arranged in the center of the body. The input pins are arranged at a first side of the body and are electrically connected to the main circuit unit. The output pins are arranged at a side of the body opposite to the first side and are electrically connected to the main circuit unit. The control pins are arranged at a second side of the body and are electrically connected to the main circuit unit. The ground pins are arranged at corners of the body to separate the input pins, the output pins and the control pins.
    Type: Grant
    Filed: October 20, 2021
    Date of Patent: October 3, 2023
    Assignee: LERAIN TECHNOLOGY CO., LTD.
    Inventors: Miaobin Gao, Chia-Chi Hu
  • Publication number: 20230170924
    Abstract: A signal feedback gain circuit is disclosed. The signal feedback gain circuit includes a signal input terminal, a summing point, a gain module, a signal output terminal and a plurality of feedback paths. The signal input terminal is for inputting a transmission signal. The summing point is connected to the signal input terminal. The gain module is connected to the summing point to input and adjust the gain of the transmission signal. The signal output terminal is for receiving the transmission signal and outputting it to an electronic module. The plurality of feedback paths are connected in parallel to the signal output terminals so as to input the transmission signal and are further connected in parallel to the summing point so as to feedback the transmission signal to the summing point. Accordingly, the plurality of feedback paths can adjust a gain curve of the transmission signal.
    Type: Application
    Filed: April 11, 2022
    Publication date: June 1, 2023
    Inventors: MIAOBIN GAO, CHIA-CHI HU
  • Publication number: 20220393915
    Abstract: A signal transmission circuit element, a multiplexer circuit element and a demultiplexer circuit element are disclosed. The signal transmission circuit element is connected among multiple electronic modules so as to transmit an electrical signal. The signal transmission circuit element includes an input terminal, an input equalizer, an output driver and an output terminal. The input terminal is for inputting an electrical signal to the input equalizer. The output driver is electrically connected to the input equalizer. The output terminal is electrically connected to the output driver so as to output the electrical signal. Accordingly, after the input terminal receives the electrical signal, the input equalizer can perform gain compensation on the electrical signal, and then an output capacitance of the electrical signal is driven by the output driver and outputted through the output terminal.
    Type: Application
    Filed: October 22, 2021
    Publication date: December 8, 2022
    Inventors: MIAOBIN GAO, CHIA-CHI HU
  • Publication number: 20220376443
    Abstract: A signal transmission circuit packaging structure is disclosed. The signal transmission circuit packaging structure includes a body, a main circuit unit, power pins, input pins, output pins, control pins and ground pins. The main circuit unit is arranged in the center of the body. The power pins are arranged in the center of the body. The input pins are arranged at a first side of the body and are electrically connected to the main circuit unit. The output pins are arranged at a side of the body opposite to the first side and are electrically connected to the main circuit unit. The control pins are arranged at a second side of the body and are electrically connected to the main circuit unit. The ground pins are arranged at corners of the body to separate the input pins, the output pins and the control pins.
    Type: Application
    Filed: October 20, 2021
    Publication date: November 24, 2022
    Inventors: MIAOBIN GAO, CHIA-CHI HU
  • Publication number: 20220311427
    Abstract: A routing integrated circuit element is disclosed. The routing integrated circuit element is connected between a first and a second electronic module and includes a body, a first, and a second buffer element. A first side of the body is connected to the first electronic module. A second side is connected to the second electronic module and located on a different side from the first side. The distance between the second side and the second electronic module is shorter than the distance between the second side and the first electronic module. The first buffer element transmits an electronic signal from the first side to the second side. The second buffer element transmits the electronic signal from the second side to the first side, wherein the transmission directions of the electronic signals transmitted by the first buffer element and the second buffer element are opposite.
    Type: Application
    Filed: December 17, 2021
    Publication date: September 29, 2022
    Inventors: MIAOBIN GAO, CHIA-CHI HU
  • Publication number: 20220312580
    Abstract: A signal transmission circuit packaging structure is disclosed. The signal transmission circuit packaging structure includes a body, a main circuit unit, power pins, input pins, output pins, control pins, and ground pins. The main circuit unit is arranged in the center of the body. The power pins supply power signal to the main circuit unit. The input pins and the output pins are arranged on a first and a second side of the body separately for electrically connecting to the main circuit unit. The control pins are arranged on the second side of the body and electrically connected to the main circuit unit. The ground pins are arranged at corners of the body to separate the input pins, the output pins, and the control pins.
    Type: Application
    Filed: December 17, 2021
    Publication date: September 29, 2022
    Inventors: MIAOBIN GAO, CHIA-CHI HU
  • Patent number: 10019022
    Abstract: A power circuit includes a first regulator and an impedance adjustment unit. The first regulator has a loop-back impedance, and provides a first power signal. The impedance adjustment unit is coupled to the first regulator, and operates to cause the first regulator to provide a second power signal having a power level different from that of the first power signal.
    Type: Grant
    Filed: April 11, 2016
    Date of Patent: July 10, 2018
    Assignee: M2Communication Inc.
    Inventors: Chia-Chi Hu, Hung-Ta Tso, Chun-Yi Lee, Derrick Wei
  • Publication number: 20170293312
    Abstract: A power circuit includes a first regulator and an impedance adjustment unit. The first regulator has a loop-back impedance, and provides a first power signal. The impedance adjustment unit is coupled to the first regulator, and operates to cause the first regulator to provide a second power signal having a power level different from that of the first power signal.
    Type: Application
    Filed: April 11, 2016
    Publication date: October 12, 2017
    Applicant: M2Communication Inc.
    Inventors: Chia-Chi Hu, Hung-Ta Tso, Chun-Yi Lee, Derrick Wei