Patents by Inventor Chia Chi Lin
Chia Chi Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20240381608Abstract: A transistor includes a gate structure that has a first gate dielectric layer and a second gate dielectric layer. The first gate dielectric layer is disposed over the substrate. The first gate dielectric layer contains a first type of dielectric material that has a first dielectric constant. The second gate dielectric layer is disposed over the first gate dielectric layer. The second gate dielectric layer contains a second type of dielectric material that has a second dielectric constant. The second dielectric constant is greater than the first dielectric constant. The first dielectric constant and the second dielectric constant are each greater than a dielectric constant of silicon oxide.Type: ApplicationFiled: July 23, 2024Publication date: November 14, 2024Inventors: Chih-Yu Hsu, Jian-Hao Chen, Chia-Wei Chen, Shan-Mei Liao, Hui-Chi Chen, Yu-Chia Liang, Shih-Hao Lin, Kuei-Lun Lin, Kuo-Feng Yu, Feng-Cheng Yang, Yen-Ming Chen
-
Publication number: 20240379745Abstract: In some embodiments, the present disclosure relates to an integrated chip including a first transistor and a second transistor arranged over a substrate. The first transistor includes first and second source/drain regions over the substrate and includes a first channel structure directly between the first and second source/drain regions. A first gate electrode is arranged over the first channel structure and is between first and second air spacer structures. The second transistor includes third and fourth source/drain regions over the substrate and includes a second channel structure directly between the third and fourth source/drain regions. A second gate electrode is arranged over the second channel structure and is between third and fourth air spacer structures. The integrated chip further includes a high-k dielectric spacer structure over a low-k dielectric fin structure between the first and second channel structures to separate the first and second gate electrodes.Type: ApplicationFiled: July 24, 2024Publication date: November 14, 2024Inventors: Huan-Chieh Su, Chia-Hao Chang, Cheng-Chi Chuang, Chih-Hao Wang, Yu-Ming Lin
-
Patent number: 12124307Abstract: A media streaming device includes a power manager, a stream processor, and a voltage detector. The power manager receives a power signal from the media playback device to supply power to the stream processor. The stream processor provides media stream to the media playback device for playback. The voltage detector is electrically coupled to the stream processor and captures at least a part of the power supply current to the stream processor. The stream processor is configured to determine whether the power supply voltage remains stable. When the supply voltage remains stable, the stream processor operates in a first mode to provide media stream. When the power supply voltage is unstable, the stream processor operates in a second mode to provide media stream, and the power consumption of the stream processor in the second mode is lower than the power consumption in the first mode.Type: GrantFiled: August 23, 2022Date of Patent: October 22, 2024Assignee: Realtek Semiconductor CorporationInventors: Chao-Min Lai, Chia-Chi Yeh, Chieh-Lung Hsieh, Chih-Feng Lin
-
Publication number: 20240337920Abstract: A design method of a photomask structure including the following steps is provided. A first layout pattern is provided. An assist pattern is added aside the first layout pattern. An optical proximity correction (OPC) is performed to convert the first layout pattern into a second layout pattern, wherein the assist pattern has an adjacent portion adjacent to the second layout pattern, a first distance between the adjacent portion and the second layout pattern is less than a safety distance, and the safety distance is a distance to prevent the assist pattern from being transferred to a photoresist layer during a lithography process. After the OPC is performed, the adjacent portion is shifted to increase the first distance to a second distance, wherein the second distance is greater than or equal to the safety distance.Type: ApplicationFiled: June 12, 2023Publication date: October 10, 2024Applicant: Powerchip Semiconductor Manufacturing CorporationInventors: Kuei Yu Chien, Yung Ching Mai, Shin-Shing Yeh, Chia-Chi Lin, Jun-Cheng Lai
-
Patent number: 12100731Abstract: A capacitor device, such as a metal insulator metal (MIM) capacitor includes a seed layer including tantalum, a first electrode on the seed layer, where the first electrode includes at least one of ruthenium or iridium and an insulator layer on the seed layer, where the insulator layer includes oxygen and one or more of Sr, Ba or Ti. In an exemplary embodiment, the insulator layer is a crystallized layer having a substantially smooth surface. A crystallized insulator layer having a substantially smooth surface facilitates low electrical leakage in the MIM capacitor. The capacitor device further includes a second electrode layer on the insulator layer, where the second electrode layer includes a second metal or a second metal alloy.Type: GrantFiled: June 26, 2020Date of Patent: September 24, 2024Assignee: Intel CorporationInventors: Kaan Oguz, I-Cheng Tung, Chia-Ching Lin, Sou-Chi Chang, Matthew Metz, Uygar Avci
-
Publication number: 20240312983Abstract: The disclosure provides an electronic apparatus and a manufacturing method thereof. The electronic apparatus includes a first insulating layer, a first metal layer, a second metal layer, a PN junction assembly, and a transistor circuit. The first insulating layer includes a first surface and a second surface opposite to the first surface. The first metal layer is formed above the second surface. The second metal layer is formed on the second surface. The PN junction assembly is disposed on the first surface and electrically connected with the first metal layer and the second metal layer. The PN junction assembly includes a variable capacitor. The transistor circuit is electrically connecting with the second metal layer.Type: ApplicationFiled: May 22, 2024Publication date: September 19, 2024Applicant: Innolux CorporationInventors: Tang Chin Hung, Chin-Lung Ting, Chung-Kuang Wei, Ker-Yih Kao, Tong-Jung Wang, Chih-Yung Hsieh, Hao Jung Huang, I-Yin Li, Chia-Chi Ho, Yi Hung Lin, Cheng-Hsu Chou, Chia-Ping Tseng
-
Patent number: 12095152Abstract: An electronic device is provided. The electronic device includes a substrate, a conductive layer, an insulating layer, and a modulating material. The conductive layer is disposed on the substrate and has a first opening penetrating through the conductive layer. The insulating layer is disposed on the conductive layer and includes a second opening penetrating through the insulating layer. The first opening of the conductive layer and the second opening of the insulating layer are at least partially overlapped. The modulating material is disposed on the insulating layer.Type: GrantFiled: May 11, 2023Date of Patent: September 17, 2024Assignee: INNOLUX CORPORATIONInventors: Yi-Hung Lin, Tang-Chin Hung, Chia-Chi Ho, I-Yin Li
-
Publication number: 20240297168Abstract: The disclosure provides an electronic apparatus. The electronic apparatus includes an insulator, a driving unit, an electronic unit, and a circuit unit. The driving unit is overlapped with the insulator. The electronic unit is overlapped with the insulator. The circuit unit is electrically connected to the driving unit. The driving unit receives a signal from the circuit unit and drives the electronic unit.Type: ApplicationFiled: May 14, 2024Publication date: September 5, 2024Applicant: Innolux CorporationInventors: Tang Chin Hung, Chin-Lung Ting, Chung-Kuang Wei, Ker-Yih Kao, Tong-Jung Wang, Chih-Yung Hsieh, Hao Jung Huang, I-Yin Li, Chia-Chi Ho, Yi Hung Lin, Cheng-Hsu Chou, Chia-Ping Tseng
-
Publication number: 20240297253Abstract: A semiconductor device includes a fin structure protruding from an isolation insulating layer disposed over a substrate and having a channel region, a source/drain region disposed over the substrate, a gate dielectric layer disposed on the channel region, and a gate electrode layer disposed on the gate dielectric layer. The gate electrode includes a lower portion below a level of a top of the channel region and above an upper surface of the isolation insulating layer, and a width of the lower portion is not constant.Type: ApplicationFiled: May 7, 2024Publication date: September 5, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yan-Ting SHEN, Chia-Chi YU, Chih-Teng LIAO, Yu-Li LIN, Chih Hsuan CHENG, Tzu-Chan WENG
-
Patent number: 12074386Abstract: This document describes methods and systems for an antenna system integrated with side-keys of an electronic device. The antenna system enables antenna integration in a metal frame using a metal support structure and fastener(s) to route antenna signals around side-key modules embedded in the frame without encountering or causing interference with the side-key modules. By using these techniques to integrate antennas on areas around the side-key modules, more antennas can be implemented on the electronic device, leading to improved capabilities supporting additional wireless standards and a better user experience in terms of improved communication quality.Type: GrantFiled: September 21, 2022Date of Patent: August 27, 2024Assignee: Google LLCInventors: Jeng-Hau Lu, Yu-Chieh Lin, Min-Sen Kuo, Chia-Chi Huang, Ying-Chih Wang
-
Patent number: 12074206Abstract: A device includes a semiconductor substrate, a fin structure on the semiconductor substrate, a gate structure on the fin structure, and a pair of source/drain features on both sides of the gate structure. The gate structure includes an interfacial layer on the fin structure, a gate dielectric layer on the interfacial layer, and a gate electrode layer of a conductive material on and directly contacting the gate dielectric layer. The gate dielectric layer includes nitrogen element.Type: GrantFiled: August 30, 2021Date of Patent: August 27, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chia-Wei Chen, Chih-Yu Hsu, Hui-Chi Chen, Shan-Mei Liao, Jian-Hao Chen, Cheng-Hao Hou, Huang-Chin Chen, Cheng Hong Yang, Shih-Hao Lin, Tsung-Da Lin, Da-Yuan Lee, Kuo-Feng Yu, Feng-Cheng Yang, Chi On Chui, Yen-Ming Chen
-
Publication number: 20240275919Abstract: A video and audio streaming transmission system is provided. The video and audio streaming transmission system includes a receiving end module, a first transmitting end module and a second transmitting end module. The first transmitting end module obtains a first audio signal, and sends the first audio signal to the receiving end module. The second transmitting end module obtains a second audio signal, and sends the second audio signal to the receiving end module. The receiving end module returns a processed audio signal to the first computer device according to the first audio signal and the second audio signal, so that the first computer device provides the processed audio signal to a conference module.Type: ApplicationFiled: October 11, 2023Publication date: August 15, 2024Applicant: BENQ CORPORATIONInventors: Chao-Kuang Yen, Yu-Ping Huang, Chen-Chi Wu, Cheng-Pu Lin, Chia-Nan Shih, Jung-Kun Tseng
-
Publication number: 20240274461Abstract: A die bonding tool having a tool head including a plurality of openings fluidly coupled to a vacuum source to selectively secure a semiconductor die onto the tool head via the application of a suction force. The plurality of openings have non-uniform cross-sectional areas, including one or more first openings having a first cross-sectional area and one or more second openings having a second cross-sectional area that is greater than the first cross-section area. A first minimum offset distance between each of the first openings and any peripheral edge of the tool head is less than a second minimum offset distance between each of the second openings and any peripheral edge of the tool head. The configuration of the openings in the tool head may improve bonding of the semiconductor die to a substrate by inhibiting air becoming trapped between the semiconductor die and the substrate during the bonding process.Type: ApplicationFiled: February 15, 2023Publication date: August 15, 2024Inventors: Chia-Yin CHEN, I-Chun HSU, Yu-Sheng LIN, Yan-Zuo TSAI, Yung-Chi LIN, Tsang-Jiuh WU, Wen-Chih CHIOU
-
Patent number: 12051388Abstract: A transmitter device adapted to be coupled to an image providing device and a receiver device includes first and second conversion units, a wireless module, and a processing unit. The first conversion unit and the second conversion unit are configured to be coupled to the image providing device through an HDMI transmission cable and a Type-C transmission cable, respectively, so as to respectively receive a first video and audio stream and a second video and audio stream provided by the image providing device. The wireless module is connected to the receiver device through wireless communication. The processing unit preferentially selects the first conversion unit to receive a first video and audio signal output by converting the first video and audio stream by the first conversion unit and transmits the first video and audio signal to the receiver device through the wireless module.Type: GrantFiled: February 14, 2023Date of Patent: July 30, 2024Assignee: BenQ CorporationInventors: Chen-Chi Wu, Chin-Fu Chiang, Chun-Han Lin, Chia-Nan Shih, Jung-Kun Tseng, Chuang-Wei Wu
-
Publication number: 20240243466Abstract: A wireless briefing device includes a first antenna, a second antenna, and a ground plane. Each of the first antenna and the second antenna couples out a frequency band. A distance between the first antenna and the ground plane is between 0.2 and 0.3 times of a wavelength of the frequency band, and a distance between the second antenna and the ground plane is between 0.2 and 0.3 times of the wavelength of the frequency band.Type: ApplicationFiled: June 19, 2023Publication date: July 18, 2024Applicant: BENQ CORPORATIONInventors: Yu-Ping Huang, Chun-Han Lin, Chen-Chi Wu, Chia-Nan Shih, Cheng-Pu Lin
-
Patent number: 12040378Abstract: Described is a ferroelectric-based capacitor that improves reliability of a ferroelectric memory by providing tensile stress along a plane (e.g., x-axis) of a ferroelectric or anti-ferroelectric material of the ferroelectric/anti-ferroelectric based capacitor. Tensile stress is provided by a spacer comprising metal, semimetal, or oxide (e.g., metal or oxide of one or more of: Al, Ti, Hf, Si, Ir, or N). The tensile stress provides polar orthorhombic phase to the ferroelectric material and tetragonal phase to the anti-ferroelectric material. As such, memory window and reliability of the ferroelectric/anti-ferroelectric oxide thin film improves.Type: GrantFiled: June 1, 2021Date of Patent: July 16, 2024Assignee: Intel CorporationInventors: Nazila Haratipour, Sou-Chi Chang, Chia-Ching Lin, Jack Kavalieros, Uygar Avci, Ian Young
-
Patent number: 12041760Abstract: A transistor includes a gate structure that has a first gate dielectric layer and a second gate dielectric layer. The first gate dielectric layer is disposed over the substrate. The first gate dielectric layer contains a first type of dielectric material that has a first dielectric constant. The second gate dielectric layer is disposed over the first gate dielectric layer. The second gate dielectric layer contains a second type of dielectric material that has a second dielectric constant. The second dielectric constant is greater than the first dielectric constant. The first dielectric constant and the second dielectric constant are each greater than a dielectric constant of silicon oxide.Type: GrantFiled: August 9, 2022Date of Patent: July 16, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Chih-Yu Hsu, Jian-Hao Chen, Chia-Wei Chen, Shan-Mei Liao, Hui-Chi Chen, Yu-Chia Liang, Shih-Hao Lin, Kuei-Lun Lin, Kuo-Feng Yu, Feng-Cheng Yang, Yen-Ming Chen
-
Publication number: 20230332654Abstract: An energy-saving electromagnetic brake includes a base, a first winding coil, a second winding coil, and a control circuit component. The first winding coil is disposed inside the base, wherein the first winding coil has a first resistance value. The second winding coil is disposed inside the base and is disposed around the first winding coil, wherein the second winding coil has a second resistance value, and the second resistance value is greater than the first resistance value. The control circuit component is disposed inside the base and is electrically connected to the first winding coil and the second winding coil. In a first period, the control circuit component drives the first winding coil. In a second period, the control circuit component simultaneously drives the first winding coil and the second winding coil, and the first winding coil and the second winding coil are connected in series.Type: ApplicationFiled: October 5, 2022Publication date: October 19, 2023Inventors: Chieh-Cheng CHEN, Ming-Chih TSAI, Chia-Chi LIN, Yu-Wei HSU
-
Patent number: 11685939Abstract: A method for producing cis-unsaturated fatty acid includes the operations below. (i) An oil-water mixture is provided, wherein the oil-water mixture includes 1 to 10 parts by weight of oil and 1 part by weight of water. (ii) 0.002 to 0.5 parts by weight of a recombinant Candida rugosa lipase 1 (rCRL1) is added into the oil-water mixture. (iii) The oil-water mixture is emulsified. (iv) The emulsified oil-water mixture is hydrolyzed and fatty acid is generated. (v) Oil-water is separated at a temperature of 55° C. to 65° C. and an oil phase layer is extracted. (vi) The cooling and filtering step is performed to obtain cis-unsaturated fatty acid.Type: GrantFiled: April 14, 2021Date of Patent: June 27, 2023Assignees: CHANT OIL CO., LTD., National Taiwan Normal UniversityInventors: Guan-Chiun Lee, Ting-Chun Kuo, Shun-Niang Chen, Chia-Chi Lin
-
Patent number: 11515648Abstract: A dipole antenna is disclosed, which is formed on an electrical circuit substrate having a ground plane and comprises a first antenna group, a second antenna group and a feeding microstrip line, wherein the first antenna group and the second antenna group have the length of a quarter wavelength on the substrate, two feeding points are formed by the intersections of the individual vertical radiating metallic line and the radiating metallic line on two sides, and the feeding microstrip line is connected between the two vertical radiating metallic lines thereby enhancing the radiation signals.Type: GrantFiled: February 4, 2021Date of Patent: November 29, 2022Assignee: IQ GROUP SDN. BHD.Inventors: Shin-Hua Liao, Chia-Chi Lin, Zhi-Yuan Han