Patents by Inventor Chia Chi Liu

Chia Chi Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240136463
    Abstract: This disclosure discloses an optical sensing device. The device includes a carrier body; a first light-emitting device disposed on the carrier body; and a light-receiving device including a group III-V semiconductor material disposed on the carrier body, including a light-receiving surface having an area, wherein the light-receiving device is capable of receiving a first received wavelength having a largest external quantum efficiency so the ratio of the largest external quantum efficiency to the area is ?13.
    Type: Application
    Filed: December 20, 2023
    Publication date: April 25, 2024
    Applicant: EPISTAR CORPORATION
    Inventors: Yi-Chieh LIN, Shiuan-Leh LIN, Yung-Fu CHANG, Shih-Chang LEE, Chia-Liang HSU, Yi HSIAO, Wen-Luh LIAO, Hong-Chi SHIH, Mei-Chun LIU
  • Patent number: 11961770
    Abstract: Some embodiments of the present disclosure relate to a processing tool. The tool includes a housing enclosing a processing chamber, and an input/output port configured to pass a wafer through the housing into and out of the processing chamber. A back-side macro-inspection system is arranged within the processing chamber and is configured to image a back side of the wafer. A front-side macro-inspection system is arranged within the processing chamber and is configured to image a front side of the wafer according to a first image resolution. A front-side micro-inspection system is arranged within the processing chamber and is configured to image the front side of the wafer according to a second image resolution which is higher than the first image resolution.
    Type: Grant
    Filed: November 4, 2021
    Date of Patent: April 16, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Han Lin, Chien-Fa Lee, Hsu-Shui Liu, Jiun-Rong Pai, Sheng-Hsiang Chuang, Surendra Kumar Soni, Shou-Wen Kuo, Wu-An Weng, Gary Tsai, Chien-Ko Liao, Ya Hsun Hsueh, Becky Liao, Ethan Yu, Ming-Chi Tsai, Kuo-Yi Liu
  • Patent number: 11941298
    Abstract: A host system initiates an abort of a command that has been placed into a submission queue (SQ) of the host system. The host system identifies at least one of a first outcome and a second outcome. When the first outcome indicates that the command is not completed and the second outcome indicates that the SQ entry has been fetched from the SQ, the host system sends an abort request to a storage device, and issues a cleanup request to direct the host controller to reclaim host hardware resources allocated to the command. The host system adds a completion queue (CQ) entry to a CQ and sets an overall command status (OCS) value of the CQ entry based on at least one of the first outcome and the second outcome.
    Type: Grant
    Filed: April 19, 2022
    Date of Patent: March 26, 2024
    Assignee: MediaTek Inc.
    Inventors: Chih-Chieh Chou, Chia-Chun Wang, Liang-Yen Wang, Chin Chin Cheng, Szu-Chi Liu
  • Publication number: 20240097027
    Abstract: A semiconductor structure includes a semiconductor substrate, first to third isolation structures, and a conductive feature. The first to third isolation structures are over the semiconductor substrate and spaced apart from each other. The semiconductor substrate comprises a region surrounded by a sidewall of the first isolation structure and a first sidewall of the second isolation structure. The conductive feature extends vertically in the semiconductor substrate and between the between the second and third isolation structures, wherein the conductive feature has a rounded corner adjoining a second sidewall of the second isolation structure opposite the first sidewall of the second isolation structure.
    Type: Application
    Filed: December 1, 2023
    Publication date: March 21, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chia-Ming PAN, Chia-Ta HSIEH, Po-Wei LIU, Yun-Chi WU
  • Patent number: 11925017
    Abstract: A semiconductor device is provided. The semiconductor device includes a substrate, a stacked gate structure, and a wall structure. The stacked gate structure is on the substrate and extending along a first direction. The wall structure is on the substrate and laterally aside the stacked gate structure. The wall structure extends along the first direction and a second direction perpendicular to the first direction. The stacked gate structure is overlapped with the wall structure in the first direction and the second direction.
    Type: Grant
    Filed: January 13, 2020
    Date of Patent: March 5, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chien-Hsuan Liu, Chiang-Ming Chuang, Chih-Ming Lee, Kun-Tsang Chuang, Hung-Che Liao, Chia-Ming Pan, Hsin-Chi Chen
  • Patent number: 11915977
    Abstract: A stacked integrated circuit (IC) device and a method are disclosed. The stacked IC device includes a first semiconductor element. The first substrate includes a dielectric block in the first substrate; and a plurality of first conductive features formed in first inter-metal dielectric layers over the first substrate. The stacked IC device also includes a second semiconductor element bonded on the first semiconductor element. The second semiconductor element includes a second substrate and a plurality of second conductive features formed in second inter-metal dielectric layers over the second substrate. The stacked IC device also includes a conductive deep-interconnection-plug coupled between the first conductive features and the second conductive features. The conductive deep-interconnection-plug is isolated by dielectric block, the first inter-metal-dielectric layers and the second inter-metal-dielectric layers.
    Type: Grant
    Filed: April 12, 2021
    Date of Patent: February 27, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shu-Ting Tsai, Jeng-Shyan Lin, Dun-Nian Yaung, Jen-Cheng Liu, Feng-Chi Hung, Chih-Hui Huang, Sheng-Chau Chen, Shih Pei Chou, Chia-Chieh Lin
  • Patent number: 11916077
    Abstract: The present disclosure describes an apparatus with a local interconnect structure. The apparatus can include a first transistor, a second transistor, a first interconnect structure, a second interconnect structure, and a third interconnect structure. The local interconnect structure can be coupled to gate terminals of the first and second transistors and routed at a same interconnect level as reference metal lines coupled to ground and a power supply voltage. The first interconnect structure can be coupled to a source/drain terminal of the first transistor and routed above the local interconnect structure. The second interconnect structure can be coupled to a source/drain terminal of the second transistor and routed above the local interconnect structure. The third interconnect structure can be routed above the local interconnect structure and at a same interconnect level as the first and second interconnect structures.
    Type: Grant
    Filed: May 24, 2021
    Date of Patent: February 27, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chih-Liang Chen, Cheng-Chi Chuang, Chih-Ming Lai, Chia-Tien Wu, Charles Chew-Yuen Young, Hui-Ting Yang, Jiann-Tyng Tzeng, Ru-Gun Liu, Wei-Cheng Lin, Lei-Chun Chou, Wei-An Lai
  • Patent number: 11907508
    Abstract: Content creation techniques are described that leverage content analytics to provide insight and guidance as part of content creation. To do so, content features are extracted by a content analytics system from a plurality of content and used by the content analytics system as a basis to generate a content dataset. Event data is also collected by the content analytics system from an event data source. Event data describes user interaction with respective items of content, including subsequent activities in both online and physical environments. The event data is then used to generate an event dataset. An analytics user interface is then generated by the content analytics system using the content dataset and the event dataset and is usable to guide subsequent content creation and editing.
    Type: Grant
    Filed: April 12, 2023
    Date of Patent: February 20, 2024
    Assignee: Adobe Inc.
    Inventors: Yaman Kumar, Somesh Singh, William Brandon George, Timothy Chia-chi Liu, Suman Basetty, Pranjal Prasoon, Nikaash Puri, Mihir Naware, Mihai Corlan, Joshua Marshall Butikofer, Abhinav Chauhan, Kumar Mrityunjay Singh, James Patrick O'Reilly, Hyman Chung, Lauren Dest, Clinton Hansen Goudie-Nice, Brandon John Pack, Balaji Krishnamurthy, Kunal Kumar Jain, Alexander Klimetschek, Matthew William Rozen
  • Publication number: 20220348652
    Abstract: Disclosed herein are recombinant antibodies exhibiting binding affinity to CD47 polypeptide. According to some embodiments of the present disclosure, the recombinant antibodies are capable of blocking the interaction of CD47 and signal receptor protein-alpha (SIRP?). Accordingly, also disclosed herein are pharmaceutical compositions comprising the recombinant antibodies, and uses thereof in the treatment CD47-related diseases.
    Type: Application
    Filed: April 22, 2022
    Publication date: November 3, 2022
    Applicant: AnTaimmu BioMed Co., Ltd.
    Inventors: San-Tai SHEN, Yueh-Liang TSOU, Jen-Chieh LIN, Chia-Chi LIU
  • Publication number: 20220337161
    Abstract: The present disclosure discloses a control circuit, a control method and a voltage regulator. The technical solution provided by embodiments of the present disclosure can be extended to N*M phase applications by connecting N multi-phase power converters in a voltage regulator in parallel in an interleaving manner and controlling M-phase power stage circuits in each multi-phase power converter to be connected in parallel in an interleaving manner, thereby effectively achieving multi-phase interleaving control and reducing output voltage ripples.
    Type: Application
    Filed: April 19, 2022
    Publication date: October 20, 2022
    Inventors: Sheng-Fu Hsiao, Chia-Chi Liu, Liwen Liu, Chen Zhao
  • Patent number: 11476944
    Abstract: A multi-channel transmitter includes a light source, a pulse generator and a mode splitter. The light source generates a continuous source light wave with multiple modes that are different from each other in terms of wavelength and waveform. The pulse generator generates, based on the continuous source light wave, an intermediate light pulse with multiple modes that are different from each other in terms of wavelength and waveform. The mode splitter has a plurality of output terminals, and generates, based on the intermediate light pulse and respectively at the output terminals thereof, a plurality of output light pulses that respectively correspond to the modes of the intermediate light pulse.
    Type: Grant
    Filed: July 12, 2021
    Date of Patent: October 18, 2022
    Assignee: NATIONAL TSING HUA UNIVERSITY
    Inventors: Fan-Yi Lin, Chia-Chi Liu
  • Patent number: 11381165
    Abstract: The power supply controller is for use in a power supply circuit, for reducing acoustic noise. The power supply control circuit generates a control signal according to a voltage identification (VID) signal and a voltage sense signal, to operate a power switch in a power stage circuit, thus converting an input voltage to an output voltage. The power supply control circuit includes a conversion circuit and a PWM control circuit. The conversion circuit includes a DAC and a slope control circuit. When the power supply controller operates in an acoustic noise reduction mode and when a present level is higher than a requested level, the slope control circuit adjusts a descending slope of an analog voltage identification signal which is generated according to the VID signal, so as to restrain a decrease velocity of the output voltage to be higher than zero but not higher than a predetermined velocity.
    Type: Grant
    Filed: January 11, 2021
    Date of Patent: July 5, 2022
    Assignee: RICHTEK TECHNOLOGY CORPORATION
    Inventors: Chia-Chi Liu, Yu-Chieh Lin, Yen-Hsun Wang, Ruei-Pei Jiang
  • Patent number: 11381173
    Abstract: A switching regulator which has load transient quick response ability includes at least one power stage circuit and a control circuit. The control circuit includes a pulse width modulation (PWM) signal generation circuit and a quick response (QR) signal generation circuit. The PWM signal generation circuit generates a PWM signal according to an output voltage and a QR signal, to control a power switch of the corresponding power stage circuit, thus converting an input voltage to the output voltage. The QR signal generation circuit includes a differentiator circuit and a comparison circuit. The differentiator circuit performs a differential operation on a voltage sensing signal related to the output voltage, to generate a differential signal. The comparison circuit compares the differential signal with a QR threshold signal, such that when the differential signal exceeds the QR signal, the PWM signal generation circuit performs a QR procedure.
    Type: Grant
    Filed: January 11, 2021
    Date of Patent: July 5, 2022
    Assignee: RICHTEK TECHNOLOGY CORPORATION
    Inventors: Yung-Jen Chen, Yu-Chieh Lin, Chia-Chi Liu, Fu-To Lin
  • Publication number: 20210329191
    Abstract: The present invention provides a control method of a receiver. The control method includes the steps of: when the receiver enters a sleep/standby mode, continually detecting an auxiliary signal from an auxiliary channel to generate a detection result; and if the detection result indicates that the auxiliary signal has a preamble or a specific pattern, generating a wake-up control signal to wake up the receiver before successfully receiving the auxiliary signal having a wake-up command.
    Type: Application
    Filed: April 15, 2020
    Publication date: October 21, 2021
    Inventors: Chun-Chia Chen, Chih-Hung Pan, Chia-Chi Liu, Shun-Fang Liu, Meng-Kun Li, Chao-An Chen
  • Publication number: 20210296989
    Abstract: A switching regulator which has load transient quick response ability includes at least one power stage circuit and a control circuit. The control circuit includes a pulse width modulation (PWM) signal generation circuit and a quick response (QR) signal generation circuit. The PWM signal generation circuit generates a PWM signal according to an output voltage and a QR signal, to control a power switch of the corresponding power stage circuit, thus converting an input voltage to the output voltage. The QR signal generation circuit includes a differentiator circuit and a comparison circuit. The differentiator circuit performs a differential operation on a voltage sensing signal related to the output voltage, to generate a differential signal. The comparison circuit compares the differential signal with a QR threshold signal, such that when the differential signal exceeds the QR signal, the PWM signal generation circuit performs a QR procedure.
    Type: Application
    Filed: January 11, 2021
    Publication date: September 23, 2021
    Inventors: Yung-Jen Chen, Yu-Chieh Lin, Chia-Chi Liu, Fu-To Lin
  • Publication number: 20210296985
    Abstract: The power supply controller is for use in a power supply circuit, for reducing acoustic noise. The power supply control circuit generates a control signal according to a voltage identification (VID) signal and a voltage sense signal, to operate a power switch in a power stage circuit, thus converting an input voltage to an output voltage. The power supply control circuit includes a conversion circuit and a PWM control circuit. The conversion circuit includes a DAC and a slope control circuit. When the power supply controller operates in an acoustic noise reduction mode and when a present level is higher than a requested level, the slope control circuit adjusts a descending slope of an analog voltage identification signal which is generated according to the VID signal, so as to restrain a decrease velocity of the output voltage to be higher than zero but not higher than a predetermined velocity.
    Type: Application
    Filed: January 11, 2021
    Publication date: September 23, 2021
    Inventors: Chia-Chi Liu, Yu-Chieh Lin, Yen-Hsun Wang, Ruei-Pei Jiang
  • Patent number: 10529993
    Abstract: A method for manufacturing a catalyst for fuel cell includes: providing or receiving magnesium porphyrin-containing powder; mixing the magnesium porphyrin-containing powder with a carbon-containing carrier powder to form a first mixture, and performing a thermal treatment to pyrolyze the first mixture to form the catalyst for fuel cell. A catalyst for fuel cell is also provided herein.
    Type: Grant
    Filed: December 5, 2017
    Date of Patent: January 7, 2020
    Assignee: NATIONAL TAIWAN UNIVERSITY OF SCIENCE AND TECHNOLOGY
    Inventors: Sun-Tang Chang, Chen-Hao Wang, Chia-Chi Liu, Huan-Ping Jhong
  • Patent number: 10185336
    Abstract: A receiver includes a bias current source, a comparator and an output circuit. The bias current source is powered by a first voltage source, and generates a bias current according to a second voltage source. The first voltage source is higher than the second voltage source. The comparator, coupled to the bias current source, compares two input signals to generate a comparison signal according to the bias current. The output circuit is powered by the second voltage source, and generates an output signal according to the comparison signal. The output signal and the second voltage source belong to the same power domain.
    Type: Grant
    Filed: June 1, 2017
    Date of Patent: January 22, 2019
    Assignee: MSTAR SEMICONDUCTOR, INC.
    Inventors: Chun-Chia Chen, Jian-Feng Shiu, Chia-Chi Liu
  • Publication number: 20180239378
    Abstract: A receiver includes a bias current source, a comparator and an output circuit. The bias current source is powered by a first voltage source, and generates a bias current according to a second voltage source. The first voltage source is higher than the second voltage source. The comparator, coupled to the bias current source, compares two input signals to generate a comparison signal according to the bias current. The output circuit is powered by the second voltage source, and generates an output signal according to the comparison signal. The output signal and the second voltage source belong to the same power domain.
    Type: Application
    Filed: June 1, 2017
    Publication date: August 23, 2018
    Inventors: Chun-Chia Chen, Jian-Feng Shiu, Chia-Chi Liu
  • Publication number: 20180166694
    Abstract: A method for manufacturing a catalyst for fuel cell includes: providing or receiving magnesium porphyrin-containing powder; mixing the magnesium porphyrin-containing powder with a carbon-containing carrier powder to form a first mixture, and performing a thermal treatment to pyrolzye the first mixture to form the catalyst for fuel cell. A catalyst for fuel cell is also provided herein.
    Type: Application
    Filed: December 5, 2017
    Publication date: June 14, 2018
    Inventors: Sun-Tang Chang, Chen-Hao Wang, Chia-Chi Liu, Huan-Ping Jhong