Abstract: The present disclosure provides a semiconductor device and a fabricating method thereof, the semiconductor device including a substrate, a nucleation layer, a buffer layer, an active layer and a gate electrode. The nucleation layer is disposed on the substrate, and the buffer layer is disposed on the nucleation layer, wherein the buffer layer includes a first superlattice layer having at least two heteromaterials alternately arranged in a horizontal direction, and a second superlattice layer having at least two heteromaterials vertically stacked along a vertical direction. The at least two heteromaterials stack at least once within the second superlattice layer. The active layer is disposed on the buffer layer, and the gate electrode is disposed on the active layer.

Abstract: An over-current protection device includes first and second electrode layers and a PTC material layer laminated therebetween. The PTC material layer includes a polymer matrix, a conductive filler, and a titanium-containing dielectric filler. The polymer matrix has a fluoropolymer. The titanium-containing dielectric filler has a compound represented by a general formula of MTiO3, wherein the M represents transition metal or alkaline earth metal. The total volume of the PTC material layer is calculated as 100%, and the titanium-containing dielectric filler accounts to for 5-15% by volume of the PTC material layer.

Abstract: A power control system of a rack heat-dissipation system, which receives output voltages of a rack power supply and a module power supply, includes a first control module and a second control module operating in parallel. The first control module includes a first switching unit, a first voltage converting unit and a first monitoring unit. The second control module includes a second switching unit, a second voltage converting unit and a second monitoring unit. The first monitoring unit is connected to the rack power supply, the module power supply, the first switching unit and the first voltage converting unit, and the second monitoring unit is connected to the rack power supply, the module power supply, the second switching unit and the second voltage converting unit. The heat dissipation system can be kept in the normal operation even if one of the control modules is failed.

Abstract: An overhead hoist transfer apparatus includes a rail assembly including a straight rail having an empty section, and a curved rail having a curved empty section; an engine including a first LSD having first and second wheels at two sides respectively; and a second LSD having third and fourth wheels at two sides respectively; a moving carriage driven by the engine and suspended from the rail assembly; first and second guide wheels disposed on the first LSD; third and fourth guide wheels disposed on the second LSD; and two guide boards disposed above a joining point of the straight rail and the curved rail. An elevation of the guide boards is equal to that of the guide wheels. The guide board includes a straight edge and a curved edge.

Abstract: A multi-layer cathode coating for positive electrode of a rechargeable electrochemical cell (or secondary cell) (such as a lithium-ion secondary battery) and a secondary battery including a cathode having a multi-layer cathode coating. Multi-layer cathode coatings containing blends of one or more cathode active materials in certain weight ratios thereof.

Abstract: Provided is a recombinant microorganism including at least two genes for producing itaconic acid and its derived monomers, and the at least two genes are located on the same expression vector. The at least two genes include one encoding cis-aconitic acid decarboxylase and the other one encoding aconitase, and the genome of the recombinant microorganism includes a gene encoding the molecular chaperone protein GroELS. Also provided is a method for producing itaconic acid by using the microorganism.

Abstract: This disclosure discloses an optical sensing device. The device includes a carrier body; a first light-emitting device disposed on the carrier body; and a light-receiving device including a group III-V semiconductor material disposed on the carrier body, including a light-receiving surface having an area, wherein the light-receiving device is capable of receiving a first received wavelength having a largest external quantum efficiency so the ratio of the largest external quantum efficiency to the area is ?13.

Abstract: A powered industrial truck includes a lateral movement assembly including four sliding members and four pivotal members both on a wheeled carriage, four links having a first end pivotably secured to the sliding member and a second end pivotably secured to either end of the pivotal member, a motor shaft having two ends pivotably secured to the pivotal members respectively, a first electric motor on one frame member, and four mounts attached to the sliding members respectively; two lift assemblies including a second electric motor, a shaft having two ends rotatably secured to the sliding members respectively, two gear trains at the ends of the shaft respectively, a first gear connected to the second electric motor, a second gear on the shaft, and a first roller chain on the first and second gears; two electric attachments on the platform and being laterally moveable, each attachment. The mount has rollers.

Abstract: A method of reducing gray energy consumption and achieving optimal gray energy saving for carbon neutralization is proposed. In a cellular network, each cell or BS (group of cells) has renewable (green) and non-renewable (gray, on-grid power) energy sources. The renewable (green) energy is highly variable and unpredictable, while non-renewable (gray, on-grid power) is stable but is not renewable and thus has more carbon impact. Each cell or BS (group of cells) services is associated UEs when it is on. In one novel aspect, a cell or BS (group of cells) that consumes more non-renewable energy can give some or all of its served UEs to another cell or BS (group of cells) that consumes less non-renewable energy.

Abstract: A semiconductor device with dual side source/drain (S/D) contact structures and a method of fabricating the same are disclosed. The method includes forming a fin structure on a substrate, forming a superlattice structure on the fin structure, forming first and second S/D regions within the superlattice structure, forming a gate structure between the first and second S/D regions, forming first and second contact structures on first surfaces of the first and second S/D regions, and forming a third contact structure, on a second surface of the first S/D region, with a work function metal (WFM) silicide layer and a dual metal liner. The second surface is opposite to the first surface of the first S/D region and the WFM silicide layer has a work function value closer to a conduction band energy than a valence band energy of a material of the first S/D region.

Abstract: A semiconductor mixed material comprises an electron donor, a first electron acceptor and a second electron acceptor. The first electron donor is a conjugated polymer. The energy gap of the first electron acceptor is less than 1.4 eV. At least one of the molecular stackability, ?-?*stackability, and crystallinity of the second electron acceptor is smaller than the first electron acceptor. The electron donor system is configured to be a matrix to blend the first electron acceptor and the second electron acceptor. The present invention also provides an organic electronic device including the semiconductor mixed material.

Abstract: A method includes forming a dummy pattern over test region of a substrate; forming an interlayer dielectric (ILD) layer laterally surrounding the dummy pattern; removing the dummy pattern to form an opening; forming a dielectric layer in the opening; performing a first testing process on the dielectric layer; performing an annealing process to the dielectric layer; and performing a second testing process on the annealed dielectric layer.

Abstract: A pressure sensor is provided, wherein a ballast resistive layer is integrated in the pressure sensor so that the resistive output curve for the pressure sensor has saturation characteristics. The pressure sensor shall be prevented from breaking down by a large current that may be caused, when an overload pressure is applied on the pressure sensor, if no ballast resistive layer is added.

Abstract: A method of fabricating an organic memory device is provided. In the method, a bottom electrode is formed on a substrate. A first surface treatment is performed on the bottom electrode to form a bottom surface treatment layer on a surface thereof. A polymer thin film is formed on the bottom surface treatment layer, and a top electrode is formed on the polymer thin film.

Abstract: A pressure sensor is provided, wherein a ballast resistive layer is integrated in the pressure sensor so that the resistive output curve for the pressure sensor has saturation characteristics. The pressure sensor shall be prevented from breaking down by a large current that may be caused, when an overload pressure is applied on the pressure sensor, if no ballast resistive layer is added.

Abstract: A memory cell comprising a metal-insulator-semiconductor (MIS) structure is disclosed using a homogeneous carrier trapping layer interposed between a semiconductor layer and the gate electrode of a transistor structure so that the operation voltage is reduced and the manufacturing is simplified with lowered cost. The MIS structure comprises: a gate electrode; a semiconductor layer; and a homogeneous carrier trapping layer interposed between the gate electrode and the semiconductor layer; wherein the homogeneous carrier trapping layer comprises novolac.

Abstract: A nano compound. The nano compound includes a metal or oxide thereof and an organic compound capable of oxidation and reduction bonded to the metal or oxide thereof. The invention also provides an organic memory device including the nano compound.

Abstract: A memory cell comprising a metal-insulator-semiconductor (MIS) structure is disclosed using a homogeneous carrier trapping layer interposed between a semiconductor layer and the gate electrode of a transistor structure so that the operation voltage is reduced and the manufacturing is simplified with lowered cost. The MIS structure comprises: a gate electrode; a semiconductor layer; and a homogeneous carrier trapping layer interposed between the gate electrode and the semiconductor layer; wherein the homogeneous carrier trapping layer comprises novolac.

Abstract: A method of fabricating an organic memory device is provided. In the method, a bottom electrode is formed on a substrate. A first surface treatment is performed on the bottom electrode to form a bottom surface treatment layer on a surface thereof. A polymer thin film is formed on the bottom surface treatment layer, and a top electrode is formed on the polymer thin film.